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. 2007:4:3161-3165.
doi: 10.1109/NSSMIC.2007.4436798.

Simulation of Algorithms for Pulse Timing in FPGAs

Michael D Haselman  1 , Scott Hauck, Thomas K Lewellen, Robert S Miyaoka
Affiliations

Simulation of Algorithms for Pulse Timing in FPGAs

Michael D Haselman et al. IEEE Nucl Sci Symp Conf Rec (1997). 2007.

Abstract

Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates well above 100MHz. This, combined with FPGA's low expense and ease of use, make them an ideal technology for pulse timing and are a central part of our next generation of electronics for our pre-clinical PET scanner systems. To that end, our laboratory has been developing a pulse timing technique that uses pulse fitting to achieve timing resolution well below the sampling period of the analog to digital converter (ADC). While ADCs with sampling rates in excess of 400MS/s exist, we feel that using ADCs with lowing sampling rates has many advantages for positron emission tomography (PET) scanners. It is with this premise that we have started simulating timing algorithms using MATLAB in order to optimize the parameters before implementing the algorithm in Verilog. MATLAB simulations allow us to quickly investigate filter designs, ADC sampling rates and algorithms with real data before implementation in hardware. We report our results for a least squares fitting algorithm and a new version of a leading edge detector of PMT pulses.

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Figures

Fig. 1
Fig. 1
A representative pulse from a PMT coupled to an LSO scintillator used in this study.
Fig. 2
Fig. 2
Sample pulse from a PMT coupled to an LSO scintillator, overlaid with the best least squares fit of a curve with exponential rise and fall.
Fig. 3
Fig. 3
Full width half max of a least square error pulse fit timing algorithm versus ADC sampling rates.
Fig. 4
Fig. 4
Plot of the area of sampled and filtered pulses versus the amplitude of the pulses. The best linear fit is used to estimate the pulse amplitude from the area of the pulse.
Fig. 5
Fig. 5
Plot of the standard deviation of the points of a filtered pulse that is sampled with a 70MHz ADC. The line is a filtered pulse (also inverted), to give a reference for each point’s position on the pulse.
Fig. 6
Fig. 6
The distribution of difference of time stamps between two pulses for a sampling rate of 70MHz.
Fig. 7
Fig. 7
The architecture of the timing pick-off circuit implemented in the FPGA.
Fig. 8
Fig. 8
Plot of the full width half max coincidental timing resolution of our timing pick-off algorithm simulation.
Fig. 9
Fig. 9
Plot of the susceptibility of our timing algorithm to the correct amplitude (area), rise and decay constants. The time stamps are normalized to the parameters found by a least squared error which are represented by 0% error.
See this image and copyright information in PMC

References

    1. Moses WW, Ullish M. Factors Influencing Timing Resolution in a Commercial LSO PET Scanner. IEEE Trans. Nuclear Science. 2006;vol. 43(no 1):78–85.
    1. Zhang N, et al. A Pulse Shape Restore Method for Event Localization in PET Scintillation Detection; IEEE Nuclear Science Symp. Conf. Record; 2004. pp. 4084–4088.
    1. Leroux J-D, et al. Time Discrimination Techniques using Artificial Neural Networks for Positron Emission Tomography; IEEE Nuclear Science Symp. Conf. Record; 2004. pp. 2301–2305.
    1. Laymon CM, et al. Simplified FPGA-Based Data Acquisition System for PET. IEEE Trans. Nuclear Science. 2003;vol. 50(no 5):1483–1486.
    1. Imrek J, et al. Development of an FPGA-Based Data Acquisition Module for Small Animal PET. IEEE Trans. Nuclear Science. 2006;vol. 53(no 5):2698–2703.

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