Automatic design of digital synthetic gene circuits

Abstract

De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input-output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions.

Figure 1. Biological Boolean gates.

The simple composition of standard biological parts permits to build Boolean gates with different numbers of inputs. (A) Configuration of a two-input AND gate. A constitutive promoter is flanked by an RBS with two hairpins, one of which coincides with a riboswitch. These mRNA structures prevent ribosomes from binding the RBS and represent the targets of two different inputs: a chemical, which binds the riboswitch, and a small RNA, which is complementary to the other hairpin. Only both inputs together remove all structural hurdles and allow translation initiation. This confers an overall AND logic function to the construct. (B) Configuration of a three-input NOR gate. The RBS contains a tandem riboswitch that, in its ground state, does not form an obstacle for ribosome binding. However, when at least one input signal (chemical) reaches the corresponding aptamer, the riboswitch changes its configuration and closes the access to the RBS. Additionally, the promoter is controlled by a repressor. Hence, RNA polymerase can start transcription only when no negative transcription factor is synthesized. Overall, this gene produces a reporter protein only when all the three inputs are absent. Thus, it performs a NOR logic operation. (C) Formal symbols of standard biological parts, pools, and Boolean gates employed throughout.

Figure 2. Conversion of a truth table into a circuit scheme via the Karnaugh map method.

A Karnaugh map can be considered as a particular rearrangement of a truth table. Here, three Boolean variables (, and ) are taken into account. The values of are written on the rows of the Karnaugh map, whereas the values of and lie on its columns. The Karnaugh map method permits to derive both the SOP and POS form of the Boolean expression associated with any truth table. Here, only the SOP calculation is shown (see Text S1 for a more detailed explanation of the method). The circuit scheme follows straightforwardly: each variable that is negated in one or more clauses ( and in the example) demands a NOT gate in the input layer. Every clause corresponds to an AND gate of the internal layer. An OR gate in the final layer gathers and sums the binary outputs of the internal AND gates. In the example, chemicals, sRNAs and transcription factors regulate the three AND gates that produce a unique kind of activator able to control the final OR gate.

Figure 3. Workflow for digital gene circuit design.

The overall procedure of constructing a digital, synthetic, gene circuit starts with the network automatic design that uses our computational tool based on the Karnaugh map method (blue boxes). A solution, normally the least complex one, undergoes other simulations to check and, if necessary, improve its performance and robustness (orange boxes). Finally, if the (optimized) solution meets the necessary requisites for a faithful reproduction of the corresponding truth table, it is implemented in the lab, otherwise another circuit solution has to be taken into account.

Figure 4. Example circuit (test case A).

Test case A corresponds to the most complex Boolean formulas generated by our tool. (A) Truth table and Karnaugh map. (B) Solution distribution according to the complexity score. (C) Solution 1 scheme–the least complex one for test case A.

Figure 5. Comparison of a RNAi-based with an automatically designed circuit.

The Boolean formula is here represented both (A) as the circuit provided by Rinaudo et al. with different siRNAs and (B) as one of the solutions computed by our tool, using two activators and one sRNA. Notice that and correspond to and , respectively. Dashed lines indicate either protein synthesis or input signal conversion into a regulatory factor (NOT operation). For a better comparison with Rinaudo's scheme, we do not include the input layer in (B).

Figure 6. Circuit performance.

(A) The parameters used to estimate the quality of a digital circuit are reported on the plot of a generic solution ( outputs lie between the two red lines, outputs on the green surface). (B) Test case A solution simulation. Only the results of four (out of sixteen) truth table entries are shown. All the outputs lie between the red lines and all the outputs between the green ones. Every simulation consisted of two steps. First, the system reached a first steady state in the absence of chemicals (not shown). Afterwards, input signals were sent to the circuit. As a response, the network varied the reporter protein production and settled to a new steady state that describes the output ( or ) of the corresponding entry in the truth table. (C) Signal separation and transient for eight different solution of test case A. Transients have been rescaled with respect to the solution 1 value.

Figure 7. Circuit robustness.

Fraction of valid test case A solutions (out of ) for different promoter and RBS leakage rates. Leakage rate is expressed as a percentage of the fixed transcription/translation rate of the gates that belongs to the circuit internal gates.