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. 2011 Feb 24;6(1):172.
doi: 10.1186/1556-276X-6-172.

Hf-based high-k materials for Si nanocrystal floating gate memories

Affiliations

Hf-based high-k materials for Si nanocrystal floating gate memories

Larysa Khomenkova et al. Nanoscale Res Lett. .

Abstract

Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures. The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated. The Si-rich SiO2 active layers were used as charge storage layers, and their properties were studied versus deposition conditions and annealing treatment. The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures. It was shown that with specific deposition conditions and annealing treatment, a large memory window of about 6.8 V is achievable at a sweeping voltage of ± 6 V, indicating the utility of these stack structures for low-operating-voltage nonvolatile memory devices.

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Figures

Figure 1
Figure 1
C-V characteristics of MIS structures containing pure HfO2 and HfSiO films. High-frequency C-V characteristics of pure and Si-rich HfO2 single layers versus Si content in the films (a) and deposition temperature (b) measured at 100 kHz. The C-V curves were normalized to their respective accumulation capacitance. All the high-k films were annealed at 800°C for 15 min. Deposition temperature is mentioned in the figures.
Figure 2
Figure 2
XRD patterns and PL spectra of SRSO/SiO2 multilayers. (a) GI-XRD patterns measured for [2-nm-SRSO/SiO2]20 and [3-nm-SRSO/SiO2]20 multistacks annealed at 1,100°C for 60 min. Inset, PL spectra of the same MLs. The thickness of SRSO layer for each ML is mentioned in the figure. (b) PL properties of the [2-nm-SRSO/SiO2]20 ML versus annealing temperature; annealing time is 15 min.
Figure 3
Figure 3
C-V data of single HfSiO layer and HfSiO/SRSO/HfSiO structure measured at different frequencies. Comparison of C-V data for single HfSiO layer (a) and HfSiO/SRSO/HfSiO structure (b) measured at different frequencies. RSi = 12%. Annealing treatment at TA = 950°C, tA = 15 min, N2 flow. Inset of figure (b) demonstrates variation of ΔVfb versus applied frequency at 6 V sweep voltage.
Figure 4
Figure 4
C-V characteristics of annealed HfO2/SRSO/SiO2. C-V characteristics of HfO2/SRSO/SiO2 annealed at 800°C for 15 min (a, b) and at 950°C for 15 min (c, d) measured at 1 MHz (a, c) and versus frequency measured at 6 V sweep voltage (b, d). (e) The variation of ΔVfb versus sweep voltage for two annealing temperatures; (f) the comparison of C-V curves measured at 1 MHz versus annealing temperature. Annealing time is 15 min for all the figures.

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