A 32-channel fully implantable wireless neurosensor for simultaneous recording from two cortical regions

Abstract

We present a fully implantable, wireless, neurosensor for multiple-location neural interface applications. The device integrates two independent 16-channel intracortical microelectrode arrays and can simultaneously acquire 32 channels of broadband neural data from two separate cortical areas. The system-on-chip implantable sensor is built on a flexible Kapton polymer substrate and incorporates three very low power subunits: two cortical subunits connected to a common subcutaneous subunit. Each cortical subunit has an ultra-low power 16-channel preamplifier and multiplexer integrated onto a cortical microelectrode array. The subcutaneous epicranial unit has an inductively coupled power supply, two analog-to-digital converters, a low power digital controller chip, and microlaser-based infrared telemetry. The entire system is soft encapsulated with biocompatible flexible materials for in vivo applications. Broadband neural data is conditioned, amplified, and analog multiplexed by each of the cortical subunits and passed to the subcutaneous component, where it is digitized and combined with synchronization data and wirelessly transmitted transcutaneously using high speed infrared telemetry.

Fig. 1

(a) Block diagram of the 32-channel dual front-end neurosensor. (b) and (c) Photographic images showing the encapsulated neurosensor.

Fig. 2

Microphotograph of the preamplifier ASIC fabricated in the AMI 0.5μm 2-poly 3-metal process through the MOSIS service

Fig. 3

Block diagram of the CMOS preamplifier ASIC showing the preamplifier array, addressing and control logic, column/row select, and output unity gain buffer.

Fig. 4

Microphotographs of the dual front-end in two modes: master mode (left), slave mode (right). The integrated MEAs (by flip-chip bonding to ASICs) are shown in an orientation where the microelectrodes are facing upwards.

Fig. 5

The schematic block diagram of an individual preamplifier.

Fig. 6

Block diagram of the back-end subunit showing the LC power receiver tank circuit, diode rectifier, SAR-ADCs, digital control IC, and VCSEL.

Fig. 7

Microphotograph of the back-end subunit.

Fig. 8

Microphotograph of the digital control ASIC fabricated in the AMI 0.5μm 2-poly 3-metal process through the MOSIS service.

Fig. 9

Input referred noise spectrum density of the preamplifier with different input resistances. The integration of these curves from 0.1Hz to 100 kHz yields an rms noise of 8.5μV_rms, 10.0μV_rms, and 14.1μV_rms with input resistance of 0Ω, 100kΩ, 500kΩ respectively.

Fig. 10

Bench-top measurement setup for testing the neurosensor.

Fig. 11

Wirelessly recorded sine wave signals delivered to the neurosensor through the air gap on bench. (a) The sine wave is applied to the master front-end while leaving the inputs of the slave floating. (b) The sine wave is applied to the slave front-end while leaving the inputs of the master floating.