Direct synthesis of vertically aligned ZnO nanowires on FTO substrates using a CVD method and the improvement of photovoltaic performance

Abstract

In this work, we report a direct synthesis of vertically aligned ZnO nanowires on fluorine-doped tin oxide-coated substrates using the chemical vapor deposition (CVD) method. ZnO nanowires with a length of more than 30 μm were synthesized, and dye-sensitized solar cells (DSSCs) based on the as-grown nanowires were fabricated, which showed improvement of the device performance compared to those fabricated using transferred ZnO nanowires. Dependence of the cell performance on nanowire length and annealing temperature was also examined. This synthesis method provided a straightforward, one-step CVD process to grow relatively long ZnO nanowires and avoided subsequent nanowire transfer process, which simplified DSSC fabrication and improved cell performance.

Figure 1

Schematic of the system setup for nanowire synthesis. (not drawn to scale).

Figure 2

Vertically aligned ZnO nanowires on FTO substrates. (a) FESEM image (tilted at 15°) of a directly synthesized ZnO nanowire array on a FTO substrate. The inset is a higher-magnification image. (b) XRD pattern of the ZnO nanowires grown on the FTO substrate. The inset shows the transmission electron microscopy image of a single wire and the corresponding selected area electron diffraction pattern.

Figure 3

ZnO nanowire array length dependence on the growth time. Inset is a cross-sectional FESEM image of a nanowire array with a length of 31 μm.

Figure 4

DSSCs based on directly synthesized and transferred ZnO nanowires. (a) Cross-sectional FESEM image of a ZnO nanowire film during the peeling-off process. (b) FESEM image of the bottom of the ZnO nanowire film after removing from the silicon substrate. (c) J-V plots of DSSCs fabricated using transferred and directly grown ZnO nanowires.

Figure 5

Effect of the nanowire array length on cell performance parameters. (a) Plots of short-circuit current density and open-circuit voltage as functions of nanowire array length. (b) The overall power conversation efficiency and fill factor as functions of nanowire array length.

Figure 6

Annealing effects on the performance of DSSCs. (a) UV–vis absorption spectra of the N719 dye solutions after nanowire sensitization. The temperature represents the nanowire annealing temperature. (b) J-V curves of the DSSCs fabricated using as-grown nanowires on FTO substrates annealed at different temperatures. The inset shows the dependence of the series resistance on the annealing temperature.(c) XRD data of ZnO nanowires on FTO substrates annealed at different temperatures.