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. 2013:3:1314.
doi: 10.1038/srep01314.

Sub-10 nm gate length graphene transistors: operating at terahertz frequencies with current saturation

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Sub-10 nm gate length graphene transistors: operating at terahertz frequencies with current saturation

Jiaxin Zheng et al. Sci Rep. 2013.

Abstract

Radio-frequency application of graphene transistors is attracting much recent attention due to the high carrier mobility of graphene. The measured intrinsic cut-off frequency (f(T)) of graphene transistor generally increases with the reduced gate length (L(gate)) till L(gate) = 40 nm, and the maximum measured f(T) has reached 300 GHz. Using ab initio quantum transport simulation, we reveal for the first time that f(T) of a graphene transistor still increases with the reduced L(gate) when L(gate) scales down to a few nm and reaches astonishing a few tens of THz. We observe a clear drain current saturation when a band gap is opened in graphene, with the maximum intrinsic voltage gain increased by a factor of 20. Our simulation strongly suggests it is possible to design a graphene transistor with an extraordinary high f(T) and drain current saturation by continuously shortening L(gate) and opening a band gap.

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Figures

Figure 1
Figure 1. (a-c) Schematic model of a top-gated pure MLG FET (a), dual-gated BN/MLG/BN sandwich FET (b), and dual-gated BLG FET (c).
The two-dimensional MLG and BLG channels are contacted underneath two aluminum (Al) electrodes. Gray ball: C; light pink ball: Al; blue ball: B; heavy pink ball: B.
Figure 2
Figure 2. Contact effect between the graphene channel and metal electrodes for a 5.6-nm gate length MLG FET under zero drain-source voltage and zero gate voltage.
(a, b) Projected density of states on carbon atoms of graphene in the left/right lead (a) and in the channel (b). (c) Transmission spectrum of this device. DL/R and Dch denote the Dirac point of the graphene in the left/right electrode and the channel graphene, respectively. Inset in (a): density of states for the pure MLG; inset in (c): transmission spectrum of MLG without being contacted underneath metal electrodes under zero drain-source voltage and zero gate voltage.
Figure 3
Figure 3. Switching effect for a 5.6-nm gate length MLG FET with a drain-source voltage of Vds = 0.5 V.
(a) Transmission spectra of the off-state (Vg = −5.0 V), on-state (Vg = 6.0 V), and an intermediate state (Vg = −3.0 V).The dashed vertical line indicates the bias window. DL/R denotes the Dirac point of the graphene in the left/right electrode; formula image, formula image, and formula image denote the Dirac point of the channel graphene under Vg = −5.0, −3.0, and 6.0 V, respectively. (b) Projected density of states on carbon atoms in the channel under Vg = −5.0, −3.0, and 6.0 V, respectively. (c) Transmission eigenstates of the off-state (Vg = −5.0 V) and on-state (Vg = 6.0 V) at Ef and k = (0.4, 0). The isovalue is 0.6 a.u.
Figure 4
Figure 4
(a-e) Gate length scaling of the MLG FETs: transfer characteristics (a), on/off current ratio (b), transconductance obtained from the transfer characteristics at Vg = 0 V (c), intrinsic gate capacitance (d), and intrinsic cut-off frequency at Vg = 0 V (e). Gate dielectric thickness is tox = 1.4 nm, dielectric constant εr = 3.9, and drain-source voltage Vds = 0.5 V. The red dashed line in (e) shows a 1/Lgate dependence. (f) Product of the intrinsic cut-off frequency and the gate length as a function of the transconductance. The red dashed line is a linear fitting.
Figure 5
Figure 5. Gate length scaling of the intrinsic cut-off frequency for different graphene FETs.
The experimental values are based on the epitaxially grown graphene, exfoliated graphene, self-aligned nanowire gate, and CVD grown graphene, respectively. Data are roughly fitted by the curve showing a 1/Lgate dependence.
Figure 6
Figure 6
(a) Ids-Vds output characteristics for the top-gated MLG FETs at variable gate voltages for Lgate = 6.4 nm. (b) Ids-Vds output characteristics for a pure MLG FET and a BN/MLG/BN sandwich FET with the same Lgate = 6.4 nm under a vertical electrical field of E = −1 V/Å. (c) Ids-Vds output characteristics for a pure MLG FET and a BLG FET with the same Lgate = 9.6 nm under a vertical electrical field of E = 3 V/nm. (d) Transmission spectra of the BN/MLG/BN sandwich FET with Lgate = 6.4 nm at Vds = 0.2 V (red curve) and 0.25 V (blue curve) under a vertical external electric field of -1 V/Å and a gate voltage of −1.6 V. The dashed vertical lines indicate the bias window.
Figure 7
Figure 7. Schematic model of a MLG and (5, 0) boron nitride nanotube junction (a) and its I-Vbias output characteristic curve (b).

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