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. 2014 Oct 20:4:6676.
doi: 10.1038/srep06676.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

Affiliations

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

Siqi Yan et al. Sci Rep. .

Abstract

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

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Figures

Figure 1
Figure 1. General view and calculations of optical power limiter.
(a) General view of optical power limiter, (b) red curve: calculated red-shift as a function of input power, blue curve: transmittance at drop port as function of input power, (c) calculated output power as a function of input power.
Figure 2
Figure 2. MRR design and experimental setup.
(a) Microscope image of the grating coupler, (b) microscope image of the fabricated MRR, (c) measured transmission spectrum of the MRR (d) schematic diagram of the experimental setup.
Figure 3
Figure 3. Experimental results for CW signal.
(a) The resonance wavelength as function of input power, (b) the output peak power as function of input power.
Figure 4
Figure 4. Experimental results for 10G bit/s signal.
(a) The output peak power as function of input power, (b) the resonance wavelength as function of input power, (c) measured transmission spectra around 1558 nm, indicating the signal wavelength.
Figure 5
Figure 5. Time domain measurement of the signal.
(a) The input signal and eye-diagram, (b) the output signal when the input power is 12 dBm, (c) the output signal when the input power is 25 dBm.
Figure 6
Figure 6. Experimental results for 20 Gbit/s signal.
(a) The output peak power as function of input power, (b) the resonance wavelength as function of input power, (c) measured transmission spectra around 1558 nm, indicating the signal wavelength.
Figure 7
Figure 7. Time domain measurement of the signal.
(a) The input signal and eye-diagram, (b) the output signal when the input power is 12 dBm, (c) the output signal when the input power is 25 dBm.
Figure 8
Figure 8. Effect of signal rates on performance of the optical power limiter.
(a) The effect on threshold power, (b) the effect on amount of the red shift.

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