A Simple Capacitive Charge-Division Readout for Position-Sensitive Solid-State Photomultiplier Arrays

Abstract

A capacitive charge-division readout method for reading out a 2 × 2 array of 5 mm × 5 mm position-sensitive solid-state photomultipliers (PS-SSPM) was designed and evaluated. Using this analog multiplexing method, the 20 signals (16 position, 4 timing) from the PS-SSPM array are reduced to 5 signals (4 position, 1 timing), allowing the PS-SSPM array to be treated as an individual large-area PS-SSPM module. A global positioning approach can now be used, instead of individual positioning for each PS-SSPM in the array, ensuring that the entire light signal is utilized. The signal-to-noise ratio (SNR) and flood histogram quality at different bias voltages (27.5 V to 32.0 V at 0.5 V intervals) and a fixed temperature of 0 °C were evaluated by coupling a 6 × 6 array of 1.3 mm × 1.3 mm × 20 mm polished LSO crystals to the center of the PS-SSPM array. The timing resolution was measured at a fixed bias voltage of 31.0 V and a fixed temperature of 0 °C. All the measurements were evaluated and compared using capacitors with different values and tolerances. Capacitor values ranged from 0.051 nf to 10 nf, and the capacitance tolerance ranged from 1% to 20%. The results show that better performance was achieved using capacitors with smaller values and better capacitance tolerance. Using 0.2 nf capacitors, the SNR, energy resolution and timing resolution were 24.3, 18.2% and 8.8 ns at a bias voltage 31.0 V, respectively. The flood histogram quality was also evaluated by using a 10 × 10 array of 1 mm × 1 mm × 10 mm polished LSO crystals and a 10 × 10 array of 0.7 mm × 0.7 mm × 20 mm unpolished LSO crystals to determine the smallest crystal size resolvable. These studies showed that the high spatial resolution of the PS-SSPM was preserved allowing for 0.7 mm crystals to be identified. These results show that the capacitive charge-division analog signal processing method can significantly reduce the number of electronic channels, from 20 to 5, while retaining the excellent performance of the detector.

Keywords: Capacitive Charge–Division Readout; Electronics; PET; PS-SSPM.

Fig. 1

(a) PS-SSPMs with the capacitive-charge division readout and preamplifier board and (b) schematic of PS-SSPMs outputs and naming convention.

Fig. 2

Schematic of the capacitive charge-division readout method. The 49.9 ohm load resistors for each anode output are not shown in this picture.

Fig. 3

Schematic for the bias supply and common signal.

Fig. 4

The nine crystals indicated which are coupled to one PS-SSPM were used to calculate the flood histogram quality.

Fig. 5

Average pulse shape and amplitude.

Fig. 6

(a) noise, (b) signal and (c) SNR versus bias voltage and capacitor value.

Fig. 7

(a) noise, (b) signal and (c) SNR versus bias voltage and capacitive tolerance. The error bars correspond to the gaussian fitting error.

Fig. 8

Energy resolution versus bias voltage and (a) capacitor value and (b) capacitor tolerance.

Fig.9

Flood histograms versus bias voltage and capacitor value.

Fig.10

Flood histogram quality versus bias voltage and capacitor value.

Fig.11

(a) flood histograms and (b) flood histogram quality versus bias voltage and capacitor tolerance.

Fig. 12

Flood histogram and position profile for ((a) and (b)) 1 mm pitch and ((c) and (d)) 0.7 mm pitch crystal array.

Fig. 13

(a) Timing spectra using 0.2 nf capacitors and (b) timing resolution versus capacitor value.

Fig. 14

(a) Schematic of a 3 × 3 PS-SSPMs array and (b) schematic of the capacitive charge-division readout method for this 3 × 3 PS-SSPMs array.