A steep-slope transistor based on abrupt electronic phase transition

Abstract

Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep ('sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.

Figure 1. Schematic device design of hyper-FET and working principle.

(a) Conventional MOSFET and its transfer characteristics (channel current I_DS versus gate bias V_GS) for a fixed drain-to-source voltage V_DS. The channel-source p–n junction, modulated by the gate terminal, controls the injection of carriers into the channel limiting the switching slope (S) of the MOSFET to 60 mV per decade (Boltzmann limit). (b) Proposed hyper-FET in which an insulator-to-metal transition (IMT) material that shows electrically induced abrupt resistivity switching is electrically integrated in series with the source of a conventional MOSFET. For a given V_DS, the gate-terminal voltage V_GS modifies the current flowing through the MOSFET and the IMT material in series, triggering an abrupt phase transition. The associated delocalization of localized carriers (free-carrier amplification) across the IMT results in an abrupt decrease in the resistance of the source, enhancing the switching slope characteristics beyond the intrinsic limits of a conventional p–n junction.

Figure 2. Experimental demonstration of a VO₂-based hyper-FET.

(a) Schematic of a hyper-FET consisting of a two-terminal VO₂ device (=4 μm; =2 μm) in series with the channel of a conventional Si n-MOSFET (L_g=100 μm; W=100 μm). V_VO2 is the voltage across the VO₂ device and V_GS′ is the effective gate-to-source voltage across the MOSFET. (b) I_DS–V_GS transfer characteristics of the hyper-FET exhibiting abrupt and reversible modulation of the channel current I_DS as a function of the gate-source voltage V_GS. The abrupt turn-ON and turn-OFF of the hyper-FET corresponds to the IMT and MIT in VO₂, respectively. (c) Switching slope (S) as a function of I_DS revealing the steep-slope characteristics (S<60 mV per decade) of the hyper-FET during the forward and reverse gate bias sweep. (d) Output characteristics (I_DS–V_DS) of the hyper-FET with excellent current saturation. (e) Current versus voltage characteristics of the VO₂ device with (red) and without (blue) the MOSFET in series, illustrating the electrically triggered abrupt IMT. The channel resistance of the MOSFET acts as a series resistor, modifying the current–voltage dynamics through a feedback and inducing a negative differential resistance NDR (red) across the phase transition in VO₂. The NDR reduces the voltage across the VO₂ by ΔV_NDR. The current has been normalized to the width of the Si n-MOSFET to show that the abrupt IMT in VO₂ triggers the abrupt turn-ON of the hyper-FET shown in b.

Figure 3. Experimental demonstration a low-voltage hyper-FET using next generation FinFET technology beyond Si.

(a) Schematic of the n-hyper-FET consisting of a series combination of a scaled VO₂ (=200 nm) and a multi-channel (=3 fins) In_0.7Ga_0.3As quantum-well FinFET (L_g=500 nm). (b) Transfer characteristics (I_DS–V_GS) of the hyper-FET and the stand-alone FinFET. (c) The positive feedback provided by the VO₂ enables the hyper-FET to exhibit a ∼20 % higher ON-state current (I_DS,ON) compared with the stand-alone n-FinFET over a gate-voltage window of 0.8 V at matched OFF-state current. (d) Output characteristics (I_DS–V_DS) of the n-hyper-FET and the conventional FinFET.

Figure 4. Experimental demonstration of a low-voltage p-type hyper-FET.

(a) Schematic of the p-hyper-FET consisting of a series combination of scaled VO₂ (=200 nm) and multi-channel (=200 fins) p-type Ge quantum-well FinFET (L_g=5,000 nm). (b) Transfer characteristics (I_SD–V_GS) of the hyper-FET and the FinFET (stand-alone). (c) The p-hyper-FET shows a ∼60 % higher ON-state current (I_SD,ON) in comparison to the stand-alone FinFET over a gate-voltage window of −0.5 V at matched OFF-state current. (d) Output characteristics (I_SD–V_DS) of the p-hyper-FET and the conventional FinFET.