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. 2015 Feb:2015:10.1109/ISSCC.2015.7063137.
doi: 10.1109/ISSCC.2015.7063137.

27.6. A 0.7pF-to-10nF Fully Digital Capacitance-to-Digital Converter Using Iterative Delay-Chain Discharge

Affiliations

27.6. A 0.7pF-to-10nF Fully Digital Capacitance-to-Digital Converter Using Iterative Delay-Chain Discharge

Wanyeong Jung et al. IEEE J Solid-State Circuits. 2015 Feb.
No abstract available

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Figures

Figure 1
Figure 1
Basic structure and operation scheme of the proposed CDC.
Figure 2
Figure 2
Detailed implementation of the CDC.
Figure 3
Figure 3
Techniques for removing parasitic capacitance (top) and code deviation due to voltage and temperature sensitivity (bottom).
Figure 4
Figure 4
CDC resolution and linearity error (top), and its output temperature sensitivity (bottom).
Figure 5
Figure 5
Measured result with capacitive pressure sensor w/parasitic cancelation (top).
Figure 6
Figure 6
Performance summary and comparison.
Figure 7
Figure 7
Die micrograph of the 40nm CMOS test chip.

References

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    1. Ha H, et al. A 160nW 63.9fJ/conversion-step Capacitance-to-Digital Converter for Ultra-Low-Power Wireless Sensor Nodes. ISSCC Dig Tech Papers. 2014 Feb;:220–221.
    1. Oh S, et al. 15.4b Incremental Sigma-Delta Capacitance-to-Digital Converter with Zoom-in 9b Asynchronous SAR. VLSI Circ Symp Dig Tech Papers. 2014 Jun;:222–223.
    1. Ghaed MH, et al. Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor. IEEE Trans Circuits and Systems I: Regular Papers. 2013 Dec;60(12):3152–3162.
    1. Tan Z, et al. A 1.2-V 8.3-nJ CMOS Humidity Sensor for RFID Applications. IEEE J Solid-State Circuits. 2013 Oct;48(10):2469–2477.

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