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. 2016 Oct;63(10):3851-3856.
doi: 10.1109/TED.2016.2598855. Epub 2016 Aug 30.

Rapid and Accurate C-V Measurements

Ji-Hong Kim  1 , Pragya R Shrestha  2 , Jason P Campbell  1 , Jason T Ryan  1 , David Nminibapiel  2 , Joseph J Kopanski  1 , Kin P Cheung  1
Affiliations

Rapid and Accurate C-V Measurements

Ji-Hong Kim et al. IEEE Trans Electron Devices. 2016 Oct.

Abstract

We report a new technique for the rapid measurement of full capacitance-voltage (C-V) characteristic curves. The displacement current from a 100 MHz applied sine-wave, which swings from accumulation to strong inversion, is digitized directly using an oscilloscope from the metal-oxide-semiconductor (MOS) capacitor under test. A C-V curve can be constructed directly from this data but is severely distorted due to non-ideal behavior of real measurement systems. The key advance of this work is to extract the system response function using the same measurement set-up and a known MOS capacitor. The system response correction to the measured C-V curve of the unknown MOS capacitor can then be done by simple deconvolution. No de-skewing and/or leakage current correction is necessary, making it a very simple and quick measurement. Excellent agreement between the new fast C-V method and C-V measured conventionally by an LCR meter is achieved. The total time required for measurement and analysis is approximately 2 seconds, which is limited by our equipment.

Keywords: C-V measurement; Capacitance measurement; Fast C-V measurement; MOS devices; Semiconductor device measurements; Transient measurement.

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Figures

Fig. 1
Fig. 1
(a) Comparison between measured fast C-V (1.8 GV/s VG sweep rate) and conventional C-V curves without system response correction. While a bi-directional sweep shows both directions have large discrepancy between the two methods of measurement, one of the directions is far worse. (b): the same bi-directional sweep showing the two measurement methods are in excellent agreement once the system response is corrected by deconvolution.
Fig. 2
Fig. 2
Schematic of the fast C-V measurement system.
Fig. 3
Fig. 3
Comparison between captured current signal before and after DC offset correction (half cycle).
Fig. 4
Fig. 4
The reference C-V curve from an LCR meter before (circle) and after interpolation (solid).
Fig. 5
Fig. 5
Calculated reference displacement current and measured displacement current are compared to show discrepancy due to non-ideal system response. Also shown is the gate voltage (VG) waveform.
Fig. 6
Fig. 6
Comparison between fast C-V measured at 20 GS/s sampling rate (square dot, both direction of sweeps) and conventional C-V (circle).
Fig. 7
Fig. 7
Fast C-V measured at 20 Gs/s and with 10× enhancement in timing resolution by interpolation (round dot) is in perfect agreement with the one measured at 200 GS/s (square dot). Both are in perfect agreement with the C-V curve measured using an LCR meter (circle).
Fig. 8
Fig. 8
Effect of the difference between device under test and the reference device in fast C-V measurement. The sample with very different size (185%) from the reference (100%) clearly works far less well than the sample with relatively close size (115%). Pad capacitance was measured (separately) to be ~130 fF for all the MOS capacitors.
See this image and copyright information in PMC

References

    1. Schroder DK. Semiconductor Material and Device Characterization. 3. Piscataway, NJ, USA: IEEE press; 2006.
    1. Veksler D, Bersuker G, Madan H, Vandelli L, Minakais M, Matthews K, Young CD, Datta S, Hobbs C, Kirsch PD. Multi-technique study of defect generation in high-k gate stacks. Proc IEEE IRPS. 2012 Apr;:5D.2.1–5D.2.5.
    1. Puzzilli G, Govoreanu B, Irrera F, Rosmeulen M, Van Houdt J. Characterization of charge trapping in SiO2/Al2O3 dielectric stacks by pulsed C-V technique. Microelectron Rel. 2007 Apr-May;47:508–512.
    1. Duan TL, Ang DS. Capacitance hysteresis in the high-k/metal gate-stack from pulsed measurement. IEEE Trans Electron Devices. 2013 Apr;60(4):1349–1354.
    1. Zhang WD, Zheng XF, Ruiz Aguado D, Rosmeulen M, Blomme P, Zhang JF, Van Houdt J. Two-pulse CV: A new method for characterizing electron traps in the bulk of SiO2/high-κ dielectric stacks. IEEE Electron Device Lett. 2008 Sep;29(9):1043–1046.

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