Transparent Thin-Film Transistors Based on Sputtered Electric Double Layer

Abstract

Electric-double-layer (EDL) thin-film transistors (TFTs) have attracted much attention due to their low operation voltages. Recently, EDL TFTs gated with radio frequency (RF) magnetron sputtered SiO₂ have been developed which is compatible to large-area electronics fabrication. In this work, fully transparent Indium-Gallium-Zinc-Oxide-based EDL TFTs on glass substrates have been fabricated at room temperature for the first time. A maximum transmittance of about 80% has been achieved in the visible light range. The transparent TFTs show a low operation voltage of 1.5 V due to the large EDL capacitance (0.3 µF/cm² at 20 Hz). The devices exhibit a good performance with a low subthreshold swing of 130 mV/dec and a high on-off ratio > 10⁵. Several tests have also been done to investigate the influences of light irradiation and bias stress. Our results suggest that such transistors might have potential applications in battery-powered transparent electron devices.

Keywords: electric-double-layer (EDL); radio frequency (RF) magnetron sputtered SiO2; transparent thin-film transistors (TFTs).

Figure 1

(a) Schematic diagram of transparent EDL transistors; (b) Schematic cross-sectional view of an EDL TFT when applying a positive gate voltage. Inset: cross-sectional scanning electron microscope view of the gate dielectric layer; (c) Optical transmission spectra of the thickest part in the TFT (black curve) and SiO₂ layer (red curve). Inset: a photo of the transparent TFT on glass substrate.

Figure 2

Electrical properties of the TFTs (a) Output characteristics with V_D swept from 0 V to 1.5 V and V_G swept from 0 V to 1.5 V with a step of 0.3 V; (b) Drain current, gate leakage current and square root of drain current with V_G swept from −0.5 V to 1.5 V at V_D = 1.5 V; (c) Capacitance of SiO₂ gate dielectric as a function of frequency (20 Hz to 1 MHz) with inset showing the capacitance test structure. The channel length and width used for the devices are 60 µm and 2 mm, respectively. The SiO₂ thickness used for capacitance measurement is 200 nm.

Figure 3

Electrical properties of the transistors under different light conditions when V_G swept from −0.5 V to 2 V at V_D = 2 V. Black curve: under strong light (around 2000 lx giving by a white light LED three centimetres away from the sample). Green curve: under normal room light (around 300 lx). Red curve: in the dark. The channel length and width used for the devices are 60 µm and 2 mm, respectively.

Figure 4

Bias stress testing. Transfer characteristics of the TFT with V_D = 1.5 V at different bias stress voltages. Black curve: initial transfer curve. Red curve: transfer curve after 10 minutes’ constant bias at V_G = −1 V. Green curve: transfer curve after 10 minutes’ constant bias at V_G = 1 V. The channel length and width used for the devices are 60 µm and 2 mm, respectively.