On-chip photonic synapse

Abstract

The search for new "neuromorphic computing" architectures that mimic the brain's approach to simultaneous processing and storage of information is intense. Because, in real brains, neuronal synapses outnumber neurons by many orders of magnitude, the realization of hardware devices mimicking the functionality of a synapse is a first and essential step in such a search. We report the development of such a hardware synapse, implemented entirely in the optical domain via a photonic integrated-circuit approach. Using purely optical means brings the benefits of ultrafast operation speed, virtually unlimited bandwidth, and no electrical interconnect power losses. Our synapse uses phase-change materials combined with integrated silicon nitride waveguides. Crucially, we can randomly set the synaptic weight simply by varying the number of optical pulses sent down the waveguide, delivering an incredibly simple yet powerful approach that heralds systems with a continuously variable synaptic plasticity resembling the true analog nature of biological synapses.

Fig. 1. On-chip photonic synapse.

(A) Structure of neuron and synapse. Inset: Illustration of the synapse junction. (B) Schematic of the integrated photonic synapse resembling the function of the neural synapse. The synapse is based on a tapered waveguide (dark blue) with discrete PCM islands on top, optically connecting the presynaptic (pre-neuron) and the postsynaptic (post-neuron) signals. The red open circle is a circulator with port 2 and port 3 connecting the synapse and the post-neuron; weighting pulses are applied through port 1 to the synapse. (C) Optical microscope image of a device with the active region (red box) as the photonic synapse. The optical input to and output from the device are via apodized diffraction couplers (white boxes). Inset: A typical photonic chip containing 70 photonic synapses has a dimension smaller than a 5-pence coin. (D) Scanning electron microscope image of the active region of the photonic synapse corresponding to the red box in (C) with six GST units (1 μm × 3 μm, yellow, false-colored) on top of the waveguide (blue, false-colored). Inset: The zoomed-in tapered structure of the waveguide highlighted by the white dashed box.

Fig. 2. Finite element method (FEM) simulations of the photonic synapse with different structures.

(A) Top: Schematic shows photonic synapse with a standard design: a straight waveguide with a thin film of GST (6 μm × 0.8 μm, orange block) on top. Bottom: TE mode E-field distribution at the surface of the waveguide with the entire GST film (white box) in the crystalline state. (B) Top: Schematic shows photonic synapse with synapse-mimic design: a tapered waveguide with six discrete GST islands (1 μm × 0.8 μm each) on top, which is the structure used in our experiments. Bottom: E-field distribution with all GST islands in crystalline states. (C) E-field distributions along the center line of the waveguide surface. The yellow, purple, green, and cyan curves correspond to the E-field distribution along the dashed horizontal lines in (A) and (B) (standard and synapse-mimic) and fig. S3 (A and B) (S1 and S2), respectively. The dashed red (black) lines illustrate the left and right boundaries of the GST film (discrete GST islands) in standard and S1 (synapse-mimic and S2) designs. (D) Top: Statistical results of the E-field inside the GST film or islands (square, average value; box, SD; bottom and top lines, minimum and maximum values). Bottom: The ratio between the average E-field at the output (${\mathit{E}}_{\text{GST}}^{\text{out}}$) and input (${\mathit{E}}_{\text{GST}}^{\text{in}}$) edges of the GST film or islands corresponding to the orange dashed lines in (A) and (B) and fig. S3 (A and B).

Fig. 3. Synaptic weighting and plasticity.

(A) Demonstration of differential synaptic weighting of the device in Fig. 1 during switching between the crystalline and amorphous states of GST islands with the relative transmission change (ΔT/T₀) recorded. Each weight can be reached with the same number of pulses (50 ns at 243 pJ, 1 MHz) from any previous weight. (B) Repeatability of the weighting over multiple cycles. Inset: Statistical analysis of the change in readout for weight “0,” “1,” and “4.” The pulse applied here was 50 ns at 320 pJ, slightly larger than that in (A). (C) Five weights of the photonic synapse are obtained with switching at optical pulse energy (404.5 pJ, 50 ns). The dashed blue (yellow) boxes correspond to the first (last) weighting cycle. The upward and downward arrows in the boxes are the weighting directions. (D) Photonic synaptic weight (ΔT/T₀) as a function of optical pulse numbers. The left (right) panel corresponds to the data of the dashed blue (yellow) box in (C). The solid triangles (hollow boxes) are the data from the upward (downward) weighting direction. The dashed lines are the exponential fittings of the data with detailed fitting parameters elucidated in table S2.

Fig. 4. Proposed STDP scheme based on a photonic synapse.

(A) Schematic of the all-optical method using a photonic synapse to achieve the STDP plasticity. Split with an optical coupler (OC) (50:50), 50% of the presynaptic signal is connected to one input (P_in1) of an interferometer via a phase modulator (PM). Similarly, 50% of the postsynaptic signal is connected to the other input (P_in2) of the interferometer. The output signal (P_out) of the interferometer is used to update the synaptic weight. N_pre and N_post are pre- and postsynaptic neurons, respectively. (B) Illustration of presynaptic (black) and postsynaptic (blue) signals with no time delay (Δt = 0) and the net output power of the interferometer as the switching signal (red). (C to F) The time delay between pre- and postsynaptic signals is increasing to arbitrarily chosen values Δt₁, Δt₂, Δt₃, and Δt₄, resulting in different numbers of pulses above the threshold switching power (P_th) being sent to the synapse.