3D printed high density, reversible, chip-to-chip microfluidic interconnects

Abstract

Our latest developments in miniaturizing 3D printed microfluidics [Gong et al., Lab Chip, 2016, 16, 2450; Gong et al., Lab Chip, 2017, 17, 2899] offer the opportunity to fabricate highly integrated chips that measure only a few mm on a side. For such small chips, an interconnection method is needed to provide the necessary world-to-chip reagent and pneumatic connections. In this paper, we introduce simple integrated microgaskets (SIMs) and controlled-compression integrated microgaskets (CCIMs) to connect a small device chip to a larger interface chip that implements world-to-chip connections. SIMs or CCIMs are directly 3D printed as part of the device chip, and therefore no additional materials or components are required to make the connection to the larger 3D printed interface chip. We demonstrate 121 chip-to-chip interconnections in an 11 × 11 array for both SIMs and CCIMs with an areal density of 53 interconnections per mm² and show that they withstand fluid pressures of 50 psi. We further demonstrate their reusability by testing the devices 100 times without seal failure. Scaling experiments show that 20 × 20 interconnection arrays are feasible and that the CCIM areal density can be increased to 88 interconnections per mm². We then show the utility of spatially distributed discrete CCIMs by using an interconnection chip with 28 chip-to-world interconnects to test 45 3D printed valves in a 9 × 5 array. Each valve is only 300 μm in diameter (the smallest yet reported for 3D printed valves). Every row of 5 valves is tested to at least 10 000 actuations, with one row tested to 1 000 000 actuations. In all cases, there is no sign of valve failure, and the CCIM interconnections prove an effective means of using a single interface chip to test a series of valve array chips.

Fig. 1

(a) Clamping mechanism for interface and test chips. (b) Photo of clamped interface and test chips ready for pressure testing. (c) Schematic illustration of pressure test set up. Syringe pump is connected sequentially to individual tubes to pressure test each associated interconnection port microgasket (see text for details).

Fig. 2

(a) Schematic illustration of a 3.4×3.4×1 mm³ device chip connected to an interface chip (clamping mechanism not shown). The interface chip supplies a world-to-chip interface with an array of cylindrical recesses into which PTFE tubing is epoxied. (b) Schematic illustration of the interior of the interface chip showing how channels are routed from the cylindrical recesses to an array of interconnects on the device chip. Alignment blocks on the top of the device chip are also visible. (c) Underside of interface chip. Close-up shows that interconnects consist of an array of flow channels that terminate on the flat bottom surface of the chip, and that the device chip alignment blocks fit into recesses on the interface chip.

Fig. 3

Measured average surface roughness as a function of layer exposure time. The error bars indicate the standard deviation of the three measurements for each exposure time that are described in Sect. 2.3. Inset: microscope photo of device with adjacent regions having 600 and 800 ms layer exposure times. Faint pixelation is more observable for the former than the latter.

Fig. 4

SIM design. (a) Integrated square microgaskets printed around each vertical channel on the top surface of a device chip. The top surface is in the XY plane with the Z direction being out of the plane. (b) Schematic illustration of the cross section of the vertical plane indicated in (a). The microgaskets have height D above the surrounding planar surface of the chip. (c) Pressure as a function of time for the test set up in Fig. 1(c) using the device and interface chips in Fig. 2 for each of the 9 chip-to-chip interconnects.

Fig. 5

(a) 11 × 11 interconnect array test set up. (b) Composite image from four Zeta-20 microscope images of fabricated 11×11 array of SIMs. Close up shows details of SIMs, including slight pixelation of the sealing surface. (c) Pressure as a function of time for the test set up in (a) repeated 100 times.

Fig. 6

CCIM design. (a) Integrated microgaskets printed around each vertical channel in a square recess. (b) Schematic illustration of the cross section of the vertical plane in (a). The microgaskets have height D above the surrounding planar surface of the chip. (c) Composite image from four Zeta-20 microscope images of fabricated 11×11 array of CCIMs. Close up shows details of CCIMs. (d) Pressure as a function of time for the test set up in Fig. 5(a) repeated 100 times.

Fig. 7

(a) Schematic illustration of geometry to test 400 CCIM interconnects in a 20×20 array using two independent sets of flow channels (red and blue) that cross up and down between the chips. The plane shows the separation between device (upper) and interface (lower) chips. (b) Photograph of assembled device and interface chips. The two separate flow channels are filled with water containing red and blue food coloring. (Close-up) Microscope image of flow channels.

Fig. 8

Schematic diagrams of 3D printed pneumatically actuated membrane valve in (a) open and (b) closed states. (after Ref. 3). (c) Single 300 µm diameter valve with fluid and control channels connected to individual CCIMs. (d) (upper) Microscope image of 45-valve arrayx chip assembled with corresponding interface chip in clamping fixture as shown in (e). (d) (lower) Close-up of 45-valve array with each row of valves having their control ports connected in series to a pair of CCIMs, and each column of valves having their fluid ports connected in series to a pair of CCIMs. Each valve is 300 µm in diameter.