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. 2018 Jun 26;9(7):323.
doi: 10.3390/mi9070323.

The Evolution of Integrated Interfaces for MEMS Microphones

Piero Malcovati  1 , Andrea Baschirotto  2
Affiliations

The Evolution of Integrated Interfaces for MEMS Microphones

Piero Malcovati et al. Micromachines (Basel). .

Abstract

Over the last decade, MEMS microphones have become the leading solution for implementing the audio module in most portable devices. One of the main drivers for the success of the MEMS microphone has been the continuous improvement of the corresponding integrated interface circuit performance in terms of both dynamic range and power consumption, which enabled the introduction in mobile devices of additional functionalities, such as Hi-Fi audio recording or voice commands. As a result, MEMS microphone interface circuits evolved from just simple amplification stages to complex mixed-signal circuits, including A/D converters, with ever improving performance. This paper provides an overview of such evolution based on actual design examples, focusing, finally, on the latest cutting-edge solutions.

Keywords: MEMS microphones; data converters; microsensor interface circuits.

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Conflict of interest statement

The authors declare no conflict of interest.

Figures

Figure 1
Figure 1
The microphone market in million units since 2005 [3].
Figure 2
Figure 2
Basic structure and working principle of a MEMS microphone.
Figure 3
Figure 3
Equivalent circuit of a MEMS microphone.
Figure 4
Figure 4
Typical block diagram of the interface circuit for a MEMS microphone.
Figure 5
Figure 5
Block diagram of the preamplifier without (a) and with (b) parasitic capacitance bootstrapping.
Figure 6
Figure 6
ADC state-of-the-art based on FoMS from [40].
Figure 7
Figure 7
Block diagram of the third-order DT ΣΔ modulator (example 1).
Figure 8
Figure 8
Schematic of the SC implementation of the third-order DT ΣΔ modulator (example 1).
Figure 9
Figure 9
Measured SNDR as a function of the input signal amplitude (example 1).
Figure 10
Figure 10
Block diagram of the ΣΔ modulator (example 2).
Figure 11
Figure 11
Block diagram of the DT analog second-order ΣΔ modulator (example 2).
Figure 12
Figure 12
Schematic of the SC implementation of the DT analog second-order ΣΔ modulator (example 2).
Figure 13
Figure 13
Block diagram of the fourth-order, digital ΣΔ modulator (example 2).
Figure 14
Figure 14
Measured SNDR as a function of the input signal amplitude (example 2).
Figure 15
Figure 15
Block diagram of the reconfigurable DT MASH ΣΔ modulator (example 3).
Figure 16
Figure 16
Schematic of the SC implementation of a single stage of the reconfigurable DT MASH ΣΔ modulator (example 3).
Figure 17
Figure 17
Measured SNDR as a function of the input signal amplitude in the three main operating modes (example 3).
Figure 18
Figure 18
Block diagram of the third-order CT ΣΔ modulator (example 4).
Figure 19
Figure 19
Schematic of the active-RC implementation of the third-order CT ΣΔ modulator (example 4).
Figure 20
Figure 20
Measured SNDR as a function of the input signal amplitude (example 4).
See this image and copyright information in PMC

References

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