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. 2018 Nov 1;3(11):14567-14574.
doi: 10.1021/acsomega.8b02314. eCollection 2018 Nov 30.

In Situ SiO2 Passivation of Epitaxial (100) and (110)InGaAs by Exploiting TaSiO x Atomic Layer Deposition Process

Mantu K Hudait  1 , Michael B Clavel  1 , Jheng-Sin Liu  1 , Shuvodip Bhattacharya  1
Affiliations

In Situ SiO2 Passivation of Epitaxial (100) and (110)InGaAs by Exploiting TaSiO x Atomic Layer Deposition Process

Mantu K Hudait et al. ACS Omega. .

Abstract

In this work, an in situ SiO2 passivation technique using atomic layer deposition (ALD) during the growth of gate dielectric TaSiO x on solid-source molecular beam epitaxy grown (100)In x Ga1-x As and (110)In x Ga1-x As on InP substrates is reported. X-ray reciprocal space mapping demonstrated quasi-lattice matched In x Ga1-x As epitaxy on crystallographically oriented InP substrates. Cross-sectional transmission electron microscopy revealed sharp heterointerfaces between ALD TaSiO x and (100) and (110)In x Ga1-x As epilayers, wherein the presence of a consistent growth of an ∼0.8 nm intentionally formed SiO2 interfacial passivating layer (IPL) is also observed on each of (100) and (110)In x Ga1-x As. X-ray photoelectron spectroscopy (XPS) revealed the incorporation of SiO2 in the composite TaSiO x , and valence band offset (ΔE V) values for TaSiO x relative to (100) and (110)In x Ga1-x As orientations of 2.52 ± 0.05 and 2.65 ± 0.05 eV, respectively, were extracted. The conduction band offset (ΔE C) was calculated to be 1.3 ± 0.1 eV for (100)In x Ga1-x As and 1.43 ± 0.1 eV for (110)In x Ga1-x As, using TaSiO x band gap values of 4.60 and 4.82 eV, respectively, determined from the fitted O 1s XPS loss spectra, and the literature-reported composition-dependent In x Ga1-x As band gap. The in situ passivation of In x Ga1-x As using SiO2 IPL during ALD of TaSiO x and the relatively large ΔE V and ΔE C values reported in this work are expected to aid in the future development of thermodynamically stable high-κ gate dielectrics on In x Ga1-x As with reduced gate leakage, particularly under low-power device operation.

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Conflict of interest statement

The authors declare no competing financial interest.

Figures

Figure 1
Figure 1
Cross-sectional schematic of a TaSiOx/InxGa1–xAs gate stack and its implementation in a FinFET device architecture.
Figure 2
Figure 2
Schematic diagram of MBE-grown crystallographically oriented epitaxial p-type InxGa1–xAs layers on InP substrates. The (100)InxGa1–xAs and (110)InxGa1–xAs layers were grown at 530 and 450 °C, respectively. In addition, 1.5 and 5 nm amorphous TaSiOx layers were deposited to characterize the interface and band alignment properties.
Figure 3
Figure 3
RHEED patterns from the surface of the (100)InxGa1–xAs and (110)InxGa1–xAs epilayers were recorded during growth, exhibiting (2 × diffused-4) and (1 × diffused-4) surface reconstructions, respectively.
Figure 4
Figure 4
Surface morphology of the crystallographically oriented InxGa1–xAs layers grown on InP substrates. The measured surface roughnesses were 0.28 nm and 7.34 nm for the (100) and (110)InxGa1–xAs surfaces, respectively.
Figure 5
Figure 5
Asymmetric (115) RSMs of the (a) (100)InxGa1–xAs/InP and (b) (110)InxGa1–xAs/InP structures, respectively, revealing their closely lattice-matched nature.
Figure 6
Figure 6
XPS spectra of (100)InGaAs surface: (a) postsputtered surface, (b) after 1.5 nm Al2O3 deposition with 10 min NH4OH surface treatment, and (c) 1.5 nm Al2O3 deposition with 10 min (NH4)2S surface treatment, showing the effective removal of arsenic and gallium oxides.
Figure 7
Figure 7
(a) Representative ALD super cycle during TaSiOx deposition, and (b) XPS surface spectra from TaSiOx on (100) and (110)InxGa1–xAs. The positions of the Si 2s and 2p peaks indicate the incorporation of SiO2 within the composite dielectric.
Figure 8
Figure 8
Cross-sectional TEM micrographs of the (a) TaSiOx/(100)InxGa1–xAs structure, and (b–d) oxide/InxGa1–xAs heterointerface with expanded views of the oxide/IPL/InxGa1–xAs heterointerfaces, respectively.
Figure 9
Figure 9
Cross-sectional TEM micrographs showing the (a) TaSiOx/(110)InxGa1–xAs structure, (b) at the InxGa1–xAs/InP interface (c) expanded view of the InxGa1–xAs epilayer, wherein faceting can be observed, and (d) oxide/IPL/InxGa1–xAs heterointerface, respectively.
Figure 10
Figure 10
XPS spectra of the (a(i)) Ta 4f7/2 CL and VBM of bulk-like (5 nm) TaSiOx; (a(ii)) As 3d5/2 CL and VBM of bulk-like (100)InxGa1–xAs; (a(iii)) Ta 4f7/2 CL and As 3d5/2 CLs at the oxide/semiconductor interface taken from the 1.5 nm TaSiOx/(100)InxGa1–xAs sample; and (b) O 1s loss spectra used to extract the TaSiOx band gap. (c) Resulting band alignment at the TaSiOx/(100)InxGa1–xAs oxide/semiconductor interface.
Figure 11
Figure 11
XPS spectra of the (a(i)) Ta 4f7/2 CL and VBM of bulk-like (5 nm) TaSiOx; (a(ii)) As 3d5/2 CL and VBM of bulk-like (110)InxGa1–xAs; (a(iii)) Ta 4f7/2 and As 3d5/2 CLs at the oxide/semiconductor interface taken from the 1.5 nm TaSiOx/(110)InxGa1–xAs sample; and (b) O 1s loss spectra used to extract the TaSiOx band gap. (c) Resulting band alignment at the TaSiOx/(110)InxGa1–xAs heterointerface.
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