A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones

Abstract

Microelectromechanical systems (MEMS) microphone sensors have significantly improved in the past years, while the readout electronic is mainly implemented using switched-capacitor technology. The development of new battery powered "always-on" applications increasingly requires a low power consumption. In this paper, we show a new readout circuit approach which is based on a mostly digital Sigma Delta ( Σ Δ ) analog-to-digital converter (ADC). The operating principle of the readout circuit consists of coupling the MEMS sensor to an impedance converter that modulates the frequency of a stacked-ring oscillator-a new voltage-controlled oscillator (VCO) circuit featuring a good trade-off between phase noise and power consumption. The frequency coded signal is then sampled and converted into a noise-shaped digital sequence by a time-to-digital converter (TDC). A time-efficient design methodology has been used to optimize the sensitivity of the oscillator combined with the phase noise induced by 1 / f and thermal noise. The circuit has been prototyped in a 130 nm CMOS process and directly bonded to a standard MEMS microphone. The proposed VCO-based analog-to-digital converter (VCO-ADC) has been characterized electrically and acoustically. The peak signal-to-noise and distortion ratio (SNDR) obtained from measurements is 77.9 dB-A and the dynamic range (DR) is 100 dB-A. The current consumption is 750 μ A at 1.8 V and the effective area is 0.12 mm 2 . This new readout circuit may represent an enabling advance for low-cost digital MEMS microphones.

Keywords: MEMS microphone; VCO-ADC; oscillator-based sensor; sigma-delta modulation; time-domain circuit.

Figure 1

Oscillator-based analog-to-digital converter (ADC) for capacitive Microelectromechanical systems (MEMS) sensors: (a) Sensor connected as the load of an oscillator; (b) sensor connected via an analog interface.

Figure 2

Architecture of the proposed pseudo-differential voltage-controlled oscillator (VCO)-based analog-to-digital converter (VCO-ADC).

Figure 3

Pulse frequency modulation VCO-ADC: (a) Time model; (b) Laplace model; (c) filtered signal $w\left(t\right)$; (d) sampled output $y\left[n\right]$.

Figure 4

Time-to-digital converter: (a) 31-stage delay line; (b) sampling and demodulation schema.

Figure 5

Chronogram of digital signals in the single-ended channel configuration.

Figure 6

Simulated spectrum for an input signal of 94 dB${}_{\mathrm{SPL}}$ at 1 kHz: (a) Non-A-Weighted; (b) A-Weighted.

Figure 6

Simulated spectrum for an input signal of 94 dB${}_{\mathrm{SPL}}$ at 1 kHz: (a) Non-A-Weighted; (b) A-Weighted.

Figure 7

Simulated signal-to-quantization-noise ratio (SQNR) for an input signal of 94 dB${}_{\mathrm{SPL}}$ at 1 kHz with (a) clock jitter variation and (b) digital delay line mismatch.

Figure 7

Simulated signal-to-quantization-noise ratio (SQNR) for an input signal of 94 dB${}_{\mathrm{SPL}}$ at 1 kHz with (a) clock jitter variation and (b) digital delay line mismatch.

Figure 8

Single-ended analog core of the proposed VCO-ADC: Impedance converter, 5-stage stacked-RO, and differential cascade voltage switch level shifter.

Figure 9

Simulated analog core dynamic range in the differential configuration for different input levels referred to 94 dB${}_{\mathrm{SPL}}$ = 12 mV${}_{\mathrm{rms}}$ (A-Weighting filter applied).

Figure 10

Single-ended digital circuitry of the proposed VCO-ADC: (a) Frequency divider; (b) 31-stage delay line; (c) sampling and demodulation circuit.

Figure 11

Die micrograph and area distribution.

Figure 12

Measured dynamic range for different input levels referred to 94 dB${}_{\mathrm{SPL}}$ = 12 mV${}_{\mathrm{rms}}$ (A-Weighting filter applied).

Figure 13

Measured spectrum for an input signal of 94 dB${}_{\mathrm{SPL}}$ (12 mV${}_{\mathrm{rms}}$) at 1 kHz: (a) Non-A-Weighted; (b) A-Weighted.

Figure 14

Measured spectrum for an input signal of 109 dB${}_{\mathrm{SPL}}$ (67.5 mV${}_{\mathrm{rms}}$) at 1 kHz: (a) Non-A-Weighted; (b) A-Weighted.

Figure 15

Measured frequency response (500 Hz to 15 kHz) for an input signal of 94 dB${}_{\mathrm{SPL}}$ (12 mV${}_{\mathrm{rms}}$).

Figure 16

Test fixture used in the acoustical measurements.

Figure 17

Measured spectrum for an acoustic tone of 94 dB${}_{\mathrm{SPL}}$ at 1 kHz: (a) Non-A-Weighted; (b) A-Weighted.