Real-time cortical simulation on neuromorphic hardware

Abstract

Real-time simulation of a large-scale biologically representative spiking neural network is presented, through the use of a heterogeneous parallelization scheme and SpiNNaker neuromorphic hardware. A published cortical microcircuit model is used as a benchmark test case, representing ≈1 mm² of early sensory cortex, containing 77 k neurons and 0.3 billion synapses. This is the first hard real-time simulation of this model, with 10 s of biological simulation time executed in 10 s wall-clock time. This surpasses best-published efforts on HPC neural simulators (3 × slowdown) and GPUs running optimized spiking neural network (SNN) libraries (2 × slowdown). Furthermore, the presented approach indicates that real-time processing can be maintained with increasing SNN size, breaking the communication barrier incurred by traditional computing machinery. Model results are compared to an established HPC simulator baseline to verify simulation correctness, comparing well across a range of statistical measures. Energy to solution and energy per synaptic event are also reported, demonstrating that the relatively low-tech SpiNNaker processors achieve a 10 × reduction in energy relative to modern HPC systems, and comparable energy consumption to modern GPUs. Finally, system robustness is demonstrated through multiple 12 h simulations of the cortical microcircuit, each simulating 12 h of biological time, and demonstrating the potential of neuromorphic hardware as a neuroscience research tool for studying complex spiking neural networks over extended time periods. This article is part of the theme issue 'Harmonizing energy-autonomous computing and intelligence'.

Keywords: SpiNNaker; cortical microcircuit; low-power; neuromorphic; parallel programming; real time.

Figure 1.

Cortical microcircuit model: (a) layered structure of excitatory and inhibitory neuron populations; (b) 0.4 s of steady-state output spikes (5% of total spikes plotted for clarity) and (c) layer-wise mean population firing rates. (Online version in colour.)

Figure 2.

Analysis of cortical microcircuit output activity simulated with NEST: total, excitatory and inhibitory, spikes produced per simulation time step. Left inset shows an initial transient response, while right inset details steady-state oscillations. (Online version in colour.)

Figure 3.

Mapping of pre- and postsynaptic application cores to a SpiNNaker chip: (a) single neural application combining neuron and synapse processing (N&S), together with Poisson (P) and Delay Extension (D) cores, using entirely packet-based communication; (b) neural processing ensemble containing dedicated neuron (N), synapse (S) and Poisson cores (P), with local communication via shared memory. Monitor (M) and system (Sys) cores are required for correct chip/machine operation, but are not used directly by a simulation. (Online version in colour.)

Figure 4.

32-bit multicast packet key structure (no payload)—field sizes are representative and are adjusted based on source population size and target parallelization. (Online version in colour.)

Figure 5.

On-chip memory use and data structures for SNN simulation. Cores use shared memory for transfer of local information within a neural processing ensemble. Bold capital letters mark DMA transfers corresponding to the same labels in figure 6. (Online version in colour.)

Figure 6.

Event-based real-time execution of a neural processing ensemble. Bold capital letters mark DMA transfers corresponding to the same labels in figure 5. (Online version in colour.)

Figure 7.

Results from hard real-time simulation of cortical microcircuit model with Poisson input on SpiNNaker. Here (a) 0.4 s of output spikes (5% of total spikes plotted for clarity) and (b) layer-wise mean population firing rates. (Online version in colour.)

Figure 8.

Synapse core profiling during simulation of the Poisson input cortical microcircuit. Total spike packets received per time step plotted, together with total processed and flushed spikes: left inset details response around initial transient; while right inset details handling of extreme peak spike rates during steady-state oscillations. (Online version in colour.)

Figure 9.

Comparison of spiking output from last 10 s of cortical microcircuit simulations with Poisson input, executed using SpiNNaker in real time, and NEST at 3 × slow-down (all averaged over last 9 s of simulation): (a) single neuron firing rates; (b) coefficient of variation of inter-spike interval and (c) correlation coefficient between binned spiketrains. (Online version in colour.)

Figure 10.

Mapping of cortical microcircuit layer-wise excitatory and inhibitory populations to chip coordinates of the SpiNNaker machine: (a) DC input version and (b) Poisson input version. (Online version in colour.)