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. 2020 Apr 5;20(7):2042.
doi: 10.3390/s20072042.

Silicon Photomultiplier Sensor Interface Based on a Discrete Second Generation Voltage Conveyor

Affiliations

Silicon Photomultiplier Sensor Interface Based on a Discrete Second Generation Voltage Conveyor

Vincenzo Stornelli et al. Sensors (Basel). .

Abstract

This work presents the design of a discrete second-generation voltage conveyor (VCII) and its capability to be used as electronic interface for silicon photomultipliers. The design addressed here exploits directly at the transistor level, with commercial components, the proposed interface; the obtained performance is valuable considering both the discrete elements and the application. The architecture adopted here realizes a transimpedance amplifier that is also able to drive very high input impedance, as usually requested by photons detection. Schematic and circuital design of the discrete second-generation voltage conveyor is presented and discussed. The complete circuit interface requires a bias current of 20 mA with a dual 5V supply voltage; it has a useful bandwidth of about 106 MHz, and considering also the reduced dimensions, it is a good candidate to be used in portable applications without the need of high-cost dedicated integrated circuits.

Keywords: current mode; sensor interface; silicon photomultiplier; transimpedance amplifier; voltage current conveyor.

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Conflict of interest statement

The authors declare no conflicts of interest.

Figures

Figure 1
Figure 1
Block representation of the second-generation voltage conveyor (VCII) with its parasitic port impedances.
Figure 2
Figure 2
VCII configuration as current to voltage converter.
Figure 3
Figure 3
Simplified schematic of the proposed discrete VCII.
Figure 4
Figure 4
Complete schematic of the defined VCII in SPICE Environment.
Figure 5
Figure 5
Voltage buffer characteristics: magnitude (a) and phase (b) of α.
Figure 6
Figure 6
Voltage buffer characteristics: magnitude (a) and phase (b) of β.
Figure 7
Figure 7
Transimpedance characteristics: magnitude (a) and phase (b).
Figure 8
Figure 8
Silicon photomultiplier (SiPM) equivalent circuit.
Figure 9
Figure 9
Discrete prototype board: top (a) and bottom (b) views.
Figure 10
Figure 10
Test bench scheme of the prototype board.
Figure 11
Figure 11
Measured transfer function in magnitude of both α (left axis) and β (right axis).
Figure 12
Figure 12
Measured transimpedance characteristics: magnitude (a) and phase (b).
Figure 13
Figure 13
Ideal (grey trace) and measured (black trace) transimpedance gain at different values of the external X terminal gain resistor.
Figure 14
Figure 14
Input current pulse with a duration of 80 ns (grey trace, right axis) and output voltage signal of the defined SiPM interface (black trace, left axis).
Figure 15
Figure 15
Output voltage signal of the circuit (black trace, left axis) when considering a current pulse train with different amplitudes and repetition time (grey trace, right axis).

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