Current-Assisted SPAD with Improved p-n Junction and Enhanced NIR Performance

Abstract

Single-photon avalanche diodes (SPADs) fabricated in conventional CMOS processes typically have limited near infra-red (NIR) sensitivity. This is the consequence of isolating the SPADs in a lowly-doped deep N-type well. In this work, we present a second improved version of the "current-assisted" single-photon avalanche diode, fabricated in a conventional 350 nm CMOS process, having good NIR sensitivity owing to 14 μm thick epilayer for photon absorption. The presented device has a photon absorption area of 30 × 30 µm², with a much smaller central active area for avalanche multiplication. The photo-electrons generated in the absorption area are guided swiftly towards the central area with a drift field created by the "current-assistance" principle. The central active avalanche area has a cylindrical p-n junction as opposed to the square geometry from the previous iteration. The presented device shows improved performance in all aspects, most notably in photon detection probability. The p-n junction capacitance is estimated to be ~1 fF and on-chip passive quenching with source followers is employed to conserve the small capacitance for bringing monitoring signals off-chip. Device physics simulations are presented along with measured dark count rate (DCR), timing jitter, after-pulsing probability (APP) and photon detection probability (PDP). The presented device has a peak PDP of 22.2% at a wavelength of 600 nm and a timing jitter of 220 ps at a wavelength of 750 nm.

Keywords: CMOS; Geiger mode; SPAD; avalanche breakdown; current-assistance; single photon detector.

Figure A1

DCR measurement setup.

Figure A2

Interavalanche time measurement setup.

Figure A3

PDP measurement setup.

Figure 1

(a) Illustration of cross-section of the CA-SPAD-2 device. The depletion region boundary is roughly represented by dotted lines and lines with arrows represent the drift field direction for electrons. The “central SPAD” structure is cylindrical. (b) Top-view image of the device from layout with illustrations marking the doping layers and dimensions.

Figure 2

(a) Net doping profile of the cross-section of CA-SPAD-2. (b) Profile of the potential applied for the simulations. (c) Electric field profile (log scale) of the full detector and (d) Electric field profile (linear scale) of the central SPAD p-n junction.

Figure 3

Simulated 3d conduction band energy profile of the CA-SPAD-2 with the 2D net doping profile for reference.

Figure 4

(a) IV characteristics of CA-SPAD-2 and (inset)breakdown voltage variation for 50 devices. (b) Histogram of breakdown variation for 50 devices.

Figure 5

Passive quenching circuit for CA-SPAD-2. The voltage followers are isolated, from the high voltages, by enclosing them in a deep Nwell.

Figure 6

(a) Instance of re-triggering behavior observed at excess bias of 1.5 V. (b) Histogram of deadtime distribution for various excess bias voltages.

Figure 7

Measured dark count rate for CA-SPAD-2.

Figure 8

Measured inter-avalanche histogram at excess voltages (V_ex) = 1.5 V, 2 V and 2.5 V.

Figure 9

Measured PDP as a function of wavelength for 3 different excess bias voltages.

Figure 10

Emission from “central SPAD” area at (a) V_ex = 1.5 V, (b) V_ex = 2 V and (c) V_ex = 2.5 V. The light emission is false-colored red.

Figure 11

(a) Timing histogram measured at an excess bias of 2.5 V for 5 different wavelengths. (b) Timing histogram measured at wavelength of 840 nm for 4 different excess bias voltages. The full width half maximum represents timing jitter.