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. 2021 Mar 3;11(1):5067.
doi: 10.1038/s41598-021-84531-z.

Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

M Jagabar Sathik  1   2 , Dhafer J Almakhles  3 , N Sandeep #  4 , Marif Daula Siddique #  5
Affiliations

Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

M Jagabar Sathik et al. Sci Rep. .

Abstract

Multilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter's effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.

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Conflict of interest statement

The authors declare no competing interests.

Figures

Figure 1
Figure 1
Proposed single-phase basic unit for 9L operation.
Figure 2
Figure 2
Proposed ANPC 9L-BSCI operation (a–f) modes of operation of the positive half cycle.
Figure 3
Figure 3
Proposed new carrier signal waveform (a) compared with conventional triangular waveform (b) with various dq points (c) comparison of proposed and triangular carrier signal with different pulse width variations.
Figure 4
Figure 4
(a) Proposed multicarrier signal. (b) Typical 9L output voltage waveform.
Figure 5
Figure 5
Efficiency curves of the proposed topology.
Figure 6
Figure 6
Power loss distribution.
Figure 7
Figure 7
One cycle switching period waveform (a) for voltage and (b) for current.
Figure 8
Figure 8
Circuit diagram of proposed 9L ANPC Topology for (a) single phase system and (b) three phase system.
Figure 9
Figure 9
various experimental results of proposed 9L ANPC topology (a) output voltage and current for 10 Ω, 100 mH, (b) FC and dc-link capacitor voltages, (c) load changes from 100 Ω, 50 mH to 10 Ω, 100 mH, (d) load changes from 10 Ω, 100 mH to disconnected loads, (e) modulation index variation from 0.8 to 1.0, (f) the step input voltage changes from 100 to 200 V, (g) voltage and current of switch S3/S3′ and (h) floating capacitor currents during step input voltage changes.
Figure 10
Figure 10
Experimental voltage THD spectrum.
Figure 11
Figure 11
Prototype model of proposed 9L inverter.
See this image and copyright information in PMC

References

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