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. 2021 Mar 31;12(1):1984.
doi: 10.1038/s41467-021-22243-8.

90% yield production of polymer nano-memristor for in-memory computing

Affiliations

90% yield production of polymer nano-memristor for in-memory computing

Bin Zhang et al. Nat Commun. .

Abstract

Polymer memristors with light weight and mechanical flexibility are preeminent candidates for low-power edge computing paradigms. However, the structural inhomogeneity of most polymers usually leads to random resistive switching characteristics, which lowers the production yield and reliability of nanoscale devices. In this contribution, we report that by adopting the two-dimensional conjugation strategy, a record high 90% production yield of polymer memristors has been achieved with miniaturization and low power potentials. By constructing coplanar macromolecules with 2D conjugated thiophene derivatives to enhance the π-π stacking and crystallinity of the thin film, homogeneous switching takes place across the entire polymer layer, with fast responses in 32 ns, D2D variation down to 3.16% ~ 8.29%, production yield approaching 90%, and scalability into 100 nm scale with tiny power consumption of ~ 10-15 J/bit. The polymer memristor array is capable of acting as both the arithmetic-logic element and multiply-accumulate accelerator for neuromorphic computing tasks.

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Conflict of interest statement

The authors declare no competing interests.

Figures

Fig. 1
Fig. 1. Localized and bulk switching mechanisms.
Schematic illustration of the filamentary (upper panel) and bulk phase (lower panel) resistive switching phenomena in polymer memristor devices and their downscaling processes.
Fig. 2
Fig. 2. Molecular structure, stacking order, and uniform switching characteristics of the 2D conjugated polymer.
a Molecular structures of the 2D conjugated BDTT electron donor and BDTT-BQTPA repeating unit. b Schematic illustration of the (010) direction ππ stacking and (100) direction lamellar stacking of the PBDTT-BQTPA 2D polymer chains. c Current–voltage curves collected from dozens of the Au/PBDTT-BQTPA/ITO devices. d Immediate device current of the PBDTT-BQTPA memristor in response to applied voltage with the amplitude of 1 V and pulse width of 500 μS. e Switching voltages and f device resistances distribution of the PBDTT-BQTPA memristor.
Fig. 3
Fig. 3. Bulk switching characteristics, scaling potential, and nano device performance of the 2D conjugated polymer.
a Morphology and be ON/OFF state current mapping images of the PBDTT-BQTPA thin film over the scanning area of 5 μm × 5 μm. fj ON state current mapping images over the scanning areas ranging from 2 μm × 2 μm to 0.1 μm × 0.1 μm. k, l Scanning electron images and m cyclic current–voltage characteristics of a nanometer scale PBDTT-BQTPA memristor device fabricated in an 8 × 8 crossbar array. Inset of k shows an entire view of the 8 × 8 memristor crossbar array. The electrode stripes are colored purposely for a better illustration. n Current integration vs. scanning length of the PBDTT-BQTPA thin film.
Fig. 4
Fig. 4. Crystallinity of the 2D conjugated polymer.
GIWAXS images of the PBDTT-BQTPA thin film a in its pristine state, b under thermal annealing and c upon being subjected to voltage stressing. Line cuts of the GIWAXS of the PBDTT-BQTPA thin film in d the out-of-plane direction and e the in-plane direction. f Electrostatic potential (ESP) surface of the repeating unit of PBDTT-BQPTA derived from molecular simulation.
Fig. 5
Fig. 5. Logic operation based on the 2D polymer memristor devices.
a Circuit design, b memristor array representation, and c experimental datasets of a parallel 1-bit full adder. The blue area of c represents the logic inputs, while the orange and yellow regions represent the bit-carry and sum outputs.
Fig. 6
Fig. 6. Simulated neuromorphic pattern recognition based on the 2D polymer memristor devices.
a Architecture of LetNet-5 binary neural network for handwritten digits recognition. b Illustration of the PBDTT-BQTPA polymer memristor arrays in the binary neural network. Left panel shows the execution of XNOR operation with two bit-cells, wherein each bit-cell of the 64 × 64 subarrays is composed of one polymer device and one NMOS transistor. c Recognition accuracies of the handwritten numeral images from the MNIST dataset through offline and online trainings.

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