Fault-tolerant operation of a logical qubit in a diamond quantum processor

Abstract

Solid-state spin qubits is a promising platform for quantum computation and quantum networks^1,2. Recent experiments have demonstrated high-quality control over multi-qubit systems^3-8, elementary quantum algorithms^8-11 and non-fault-tolerant error correction^12-14. Large-scale systems will require using error-corrected logical qubits that are operated fault tolerantly, so that reliable computation becomes possible despite noisy operations^15-18. Overcoming imperfections in this way remains an important outstanding challenge for quantum science^15,19-27. Here, we demonstrate fault-tolerant operations on a logical qubit using spin qubits in diamond. Our approach is based on the five-qubit code with a recently discovered flag protocol that enables fault tolerance using a total of seven qubits^28-30. We encode the logical qubit using a new protocol based on repeated multi-qubit measurements and show that it outperforms non-fault-tolerant encoding schemes. We then fault-tolerantly manipulate the logical qubit through a complete set of single-qubit Clifford gates. Finally, we demonstrate flagged stabilizer measurements with real-time processing of the outcomes. Such measurements are a primitive for fault-tolerant quantum error correction. Although future improvements in fidelity and the number of qubits will be required to suppress logical error rates below the physical error rates, our realization of fault-tolerant protocols on the logical-qubit level is a key step towards quantum information processing based on solid-state spins.

Fig. 1. Diamond quantum processor, logical qubit and fault tolerance.

a, Our processor consists of a single NV centre and 27 ¹³C nuclear-spin qubits, for which the lattice sites and qubit–qubit interactions are known. We select five ¹³C qubits as data qubits that encode the logical state (yellow). The other qubits (grey) are not used here. We use the NV electron spin (purple) as an auxiliary qubit for stabilizer measurements and the NV ¹⁴N nuclear spin (green) as a flag qubit to ensure fault tolerance. Purple lines indicate the electron–nuclear two-qubit gates used here (Methods). Grey lines indicate dipolar nuclear–nuclear couplings greater than 6 Hz. b, Illustration of the main components of the experiment. We realize fault-tolerant encoding, gates and stabilizer measurements with real-time processing on a logical qubit of the five-qubit quantum error-correction code. To ensure that any single fault does not cause a logical error, an extra flag qubit is used to identify errors that would propagate to multi-qubit errors and corrupt the logical state. An illustration of such an error E is shown in red.

Fig. 2. Non-destructive stabilizer measurements with real-time feedforward.

a, Circuit diagram for the deterministic preparation of a four-qubit GHZ entangled state $\left({\mid \mathrm{\psi }⟩}_{+}=\left(\mid 0000⟩+\mid 1111⟩\right)/\sqrt{2}\right)$ using a measurement of the stabilizer XXXX. b, Measured expectation values of the 15 operators that define the ideal state. The obtained fidelity with the target state is 0.86(1), confirming genuine multipartite entanglement. Grey bars show the ideal expectation values. Error bars are one standard deviation.

Fig. 3. Fault-tolerant encoding of the logical qubit.

a, Encoding circuit. The first stage prepares ${|-⟩}_{\mathrm{L}}$ non-fault-tolerantly (‘non-FT preparation’) by starting with |00+0+〉 (an eigenstate of p₁, p₂) and measuring the logical operators p₃ to p₅. The second ‘FT verification’ stage consists of two stabilizer measurements, T₁ = p₂·p₄·p₅, T₂ = p₁·p₃·p₅, and a flag qubit measurement. Echo sequences are inserted between the measurements to decouple the qubits (not shown, see Supplementary Figs. 8 and 9). Successful preparation is heralded by satisfying a set of conditions for the measurement outcomes (see main text). Red indicates an example of an auxiliary qubit fault (an XY error in a two-qubit gate) that would propagate to a logical error but is detected by the T₁ verification step. Orange indicates an example of a single fault in the verification stage that would propagate into a logical error but is detected by the flag qubit. b,c, Probabilities to obtain the desired logical state ${|-⟩}_{\mathrm{L}}$ without error (P_0,−) or with a single-qubit Pauli error (P_1,−), and the probabilities to obtain the opposite logical state ${|+⟩}_{\mathrm{L}}$ with zero error (P_0,+) or with a single-qubit Pauli error (P_1,+). Note that P_1,± are summed over all 15 possible errors. These 32 states are orthogonal and span the full five-qubit Hilbert space.

Fig. 4. Fault-tolerant gates on the logically encoded qubit.

a, We apply transversal logical gates on the encoded state ${|-⟩}_{\mathrm{L}}$ and measure the resulting logical state fidelity F_L (equation (1)) with respect to the targeted state. b, Logical X_L, Y_L, H_L (Hadamard) and S_L (π/2 rotation around the z-axis) are realized by five single-qubit gates. For H_L and S_L, this is followed by a permutation of the qubits by relabelling them. c, Grey bars indicate logical state fidelity when compiling the logical gates with subsequent operations (0.95(2) for all gates). Blue bars are logical state fidelities after physically applying the transversal logical gates (0.90(2), 0.90(2), 0.83(2), 0.95(2) for X_L, Y_L, H_L and S_L, respectively). Error bars are one standard deviation.

Fig. 5. Fault-tolerant stabilizer measurement.

a, Circuit diagram to measure the stabilizer XXYIY on the encoded state. As an example to illustrate the compatibility with fault tolerance, we insert a Y error on the auxiliary qubit. This error will propagate to the two-qubit error Y₃Y₅ on the data qubits, which leads to a logical Z error. However, because the error also triggers the flag qubit, it can be accounted for (Methods). b, Probability of the measurement outcomes of the auxiliary (m_a) and flag (m_f) qubits when inserting (p_e = 1) or not inserting (p_e = 0) the Y error on the auxiliary qubit. The results show that the flag qubit successfully detects this error. c, Logical state fidelity F_L after the stabilizer measurement as a function of the error probability p_e. The non-FT case does not take the flag outcome into account. Values between p_e = 0 and p_e = 1 are calculated as weighted sums (Methods).

Extended Data Fig. 1. Non-destructive stabilizer measurements with a flag and real-time feedforward.

a, Circuit diagram for the deterministic preparation of a four-qubit GHZ entangled state $\left({|\mathrm{\psi }⟩}_{+}=\left(|0000⟩+|1111⟩\right)/\sqrt{2}\right)$ using a flagged measurement of the stabilizer XXXX. b, Measured expectation values of the 15 operators that define the ideal state. The average obtained fidelity is 0.79(1). c, Data post-selected on the flag not being raised. The obtained fidelity with the target state is 0.82(1). d, When the flag is raised, the obtained fidelity is 0.47(5). Grey bars show the ideal expectation values. Note that we perform this measurement as a test of the circuit, but that the flag information in this case does not carry any specific significance.

Extended Data Fig. 2. Measured expectation values for the encoded state.

Measured expectation values of the 31 operators that define the encoded state (for the circuit in Fig. 3). Grey bars show the ideal expectation values.