On the design and manufacturing of miniaturized microstripline power splitters for driving multicoil transmit arrays with arbitrary ratios at 7 T

Abstract

The purpose of the current study was to implement unequal microstrip power splitters for parallel transmission at 7 T that are optimized for size and loss and that can be configured for a wide range of power ratios. The splitters will enable the use of more transmit coils without a corresponding increase in the number of transmit channels or amplifiers to control specific absorption rate, shorten RF pulses, and shim inhomogeneous RF fields. Wilkinson unequal power splitters based on a novel microstrip network design were optimized to minimize their size under 8 cm in length and 9 cm in width, enabling them to be included in coil housing or cascaded in multiple stages. Splitters were designed and constructed for a wide range of output power ratios at 298 MHz. Simulations and bench tests were performed for each ratio, and a methodology was established to adapt the designs to other ratios and frequencies. The designs and code are open source and can be reproduced as is or reconfigured. The single-stage designs achieved good matches and isolations between output ports (worst isolation -15.9 dB, worst match -15.1 dB). A two-stage cascaded (one input to four outputs) power splitter with 1:2.5, 1:10, 1:3, and 1:6 ratio outputs was constructed. The worst isolation between output ports was -19.7 dB in simulation and the worst match of the three ports was -17.8 dB. The measured ratios for one- and two-stage boards were within 10% of the theoretical ratios. The power-handling capability of the smallest trace was approximately 70 W. Power loss for the one- and two-stage boards ranged from 1% to 3% in simulation compared with 5.1% to 7.2% on the bench. It was concluded that Wilkinson unequal microstrip power splitters can be implemented with a small board size (low height) and low loss, and across a wide range of output power ratios. The splitters can be cascaded in multiple stages while maintaining the expected ratios and low loss. This will enable the construction of large fixed transmit array-compression matrices with low loss.

Keywords: MR engineering; RF coils; array compression; miniaturization; optimization; parallel transmission; planar transmission line; ultra-high field MRI.

Figure 1:

Left: A 1:1 microstrip power splitter circuit using a Wilkinson topology. Right: An unequal Wilkinson microstrip power splitter, which has different trace widths on each branch.

Figure 2:

The geometry used in the calculation of the meandered trace curves. The beige traces are the potential trace positions, and the red traces are the actual chosen trace locations for this board. This is a two-layer board with a full copper ground plane on the bottom layer.

Figure 3:

Left: An initial meandering circuit layout. Right: The same circuit with ring-meandering, which reduced the board size by 37%.

Figure 4:

Illustration of the wire pattern generation code showing input parameters, functions, and an output wire pattern which is saved as a bitmap file for further processing.

Figure 5:

Simulation results for each splitting ratio. Top row: The simulated circuit boards; all boards had a full ground plane. The pink structures are the traces and the green structures are the resistors. The top plots show the simulated port matches (S11, S22, and S33) and output isolations (S23) versus frequency. Simulated power ratios (1:1, 1:2, 1:4, 1:8) are shown in the bottom plots; the power ratios were calculated from the ratio of the input port to each of the output ports (S12,S13). The nominal frequency and ratios are indicated by the vertical and horizontal dashed lines, respectively, while the simulated values are plotted with solid lines. All the bottom layers are full copper ground planes.

Figure 6:

Comparison of defected ground structure (DGS) patterns for the 1:8 splitter. DGS is implemented by removing copper on the bottom of the PC board, and each pattern appears in orange underneath the thin 0.4 mm trace in the top row. From left to right: a large block design, a three barbell design, a large barbell design, a rectangular coil, a circle pattern, and an elongated three barbell design. The second row shows the port match, the third row shows the output port isolation, and the fourth row shows the ratio for each design. The simulation results are provided on the left without the use of DGS for easy comparison.

Figure 7:

Manufactured splitters for each ratio and bench measurements versus frequency. The power ratios were calculated from the ratios of the transmission coefficients from the input port to each of the output ports (S12, S13).

Figure 8:

Bench measurements for the two-stage (1 input-to-4 output) board. (A) Bench-measured S-parameters. (B) A photo of the 2-stage board with a table of expected ratios compared to the measured ratios.

Figure 9:

Ratios of small-flip-angle gradient-recalled images collected with each port of each 1 input to 2 output splitter. The ROI for these calculations is plotted in black on the 1:1 splitter's image. Additionally, under the normalized headings the ratio of the power split is included for clarity.