A 746 nW ECG Processor ASIC Based on Ternary Neural Network
- PMID: 35921346
- DOI: 10.1109/TBCAS.2022.3196059
A 746 nW ECG Processor ASIC Based on Ternary Neural Network
Abstract
This paper presents an ultra-low power electrocardiography (ECG) processor application-specific integrated circuit (ASIC) for the real-time detection of abnormal cardiac rhythms (ACRs). The proposed ECG processor can support wearable or implantable ECG devices for long-term health monitoring. It adopts a derivative-based patient adaptive threshold approach to detect the R peaks in the PQRST complex of ECG signals. Two tiny machine learning classifiers are used for the accurate classification of ACRs. A 3-layer feed-forward ternary neural network (TNN) is designed, which classifies the QRS complex's shape, followed by the adaptive decision logics (DL). The proposed processor requires only 1 KB on-chip memory to store the parameters and ECG data required by the classifiers. The ECG processor has been implemented based on fully-customized near-threshold logic cells using thick-gate transistors in 65-nm CMOS technology. The ASIC core occupies a die area of 1.08 mm2. The measured total power consumption is 746 nW, with 0.8 V power supply at 2.5 kHz real-time operating clock. It can detect 13 abnormal cardiac rhythms with a sensitivity and specificity of 99.10% and 99.5%. The number of detectable ACR types far exceeds the other low power designs in the literature.
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