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. 2022 Oct 24;22(21):8144.
doi: 10.3390/s22218144.

Wafer-Scale Room-Temperature Bonding of Smooth Au/Ti-Based Getter Layer for Vacuum Packaging

Affiliations

Wafer-Scale Room-Temperature Bonding of Smooth Au/Ti-Based Getter Layer for Vacuum Packaging

Takashi Matsumae et al. Sensors (Basel). .

Abstract

This study demonstrates room-temperature bonding using a getter layer for the vacuum packaging of microsystems. A thick Ti layer covered with an Au layer is utilized as a getter layer because it can absorb gas molecules in the package. Additionally, smooth Au surfaces can form direct bonds for hermetic sealing at room temperature. Direct bonding using a getter layer can simplify the vacuum packaging process; however, typical getter layers are rough in bonding formation. This study demonstrates two fabrication techniques for smooth getter layers. In the first approach, the Au/Ti layer is bonded to an Au layer on a smooth SiO2 template, and the Au/SiO2 interface is mechanically exfoliated. Although the root-mean-square roughness was reduced from 2.00 to 0.98 nm, the surface was still extremely rough for direct bonding. In the second approach, an Au/Ti/Au multilayer on a smooth SiO2 template is bonded with a packaging substrate, and the Au/SiO2 interface is exfoliated. The transferred Au/Ti/Au getter layer has a smooth surface with the root-mean-square roughness of 0.54 nm and could form wafer-scale direct bonding at room temperature. We believe that the second approach would allow a simple packaging process using direct bonding of the getter layer.

Keywords: getter layer; room-temperature bonding; template stripping; wafer-scale packaging.

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Conflict of interest statement

The authors declare that they have no competing interests.

Figures

Figure 1
Figure 1
Simplified vacuum packaging process using direct bonding of getter layer.
Figure 2
Figure 2
TS process for fabrication of smooth getter layer on packaging substrate.
Figure 3
Figure 3
Getter film and template substrate after TS step.
Figure 4
Figure 4
AFM images of the (a) thin Au layer on the SiO2 template, (b) thick Au/Ti getter, and (c) Au/Ti getter layer smoothened by the TS process.
Figure 5
Figure 5
Second approach to transfer smooth Au/Ti/Au getter layer to packaging substrate.
Figure 6
Figure 6
Packaging and template wafers after transferring the Au/Ti/Au layer.
Figure 7
Figure 7
AFM images of (a) Au/Ti/Au getter layer on the SiO2 template, (b) thin Au/Ti bonding layer, and (c) transferred Au/Ti/Au getter layer on the packaging substrate.
Figure 8
Figure 8
Room temperature bonding of transferred getter layer. They were bonded in a vacuum after Ar plasma irradiation.
Figure 9
Figure 9
SAM image of Si wafers bonded using the transferred Au/Ti/Au getter layer and the Au/Ti bonding layer.
Figure 10
Figure 10
SEM image of the bonding interface. Sub-micro gaps were observed at the first bonding interface but not at the second one.
Figure 11
Figure 11
TEM image of the bonding interface. Although nanovoids were observed at the bonding interface for packaging, they did not tend to connect with others.

References

    1. Kim J., Jeong B., Chiao M., Lin L. Ultrasonic Bonding for MEMS Sealing and Packaging. IEEE Trans. Adv. Packag. 2009;32:461–467. doi: 10.1109/TADVP.2008.2009927. - DOI
    1. Dhayal M., Jeong H.G., Choi J.S. Use of Plasma Polymerisation Process for Fabrication of Bio-MEMS for Micro-Fluidic Devices. Appl. Surf. Sci. 2005;252:1710–1715. doi: 10.1016/j.apsusc.2005.03.198. - DOI
    1. Knechtel R. Low Temperature Wafer Bonding for MEMS Processes and 3D Integration; Proceedings of the 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration; Tokyo, Japan. 22–23 May 2012; pp. 258–262. - DOI
    1. Takigawa R., Higurashi E., Suga T., Sawada R. Room-Temperature Bonding of Vertical-Cavity Surface-Emitting Laser Chips on Si Substrates Using Au Microbumps in Ambient Air. Appl. Phys. Express. 2008;1:1122011–1122012. doi: 10.1143/APEX.1.112201. - DOI
    1. Lee C., Yu A., Yan L., Wang H., He J.H., Zhang Q.X., Lau J.H. Characterization of Intermediate In/Ag Layers of Low Temperature Fluxless Solder Based Wafer Bonding for MEMS Packaging. Sensors Actuators A Phys. 2009;154:85–91. doi: 10.1016/j.sna.2008.10.011. - DOI

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