Integration Technology of Micro-LED for Next-Generation Display

Abstract

Inorganic micro light-emitting diodes (micro-LEDs) based on III-V compound semiconductors have been widely studied for self-emissive displays. From chips to applications, integration technology plays an indispensable role in micro-LED displays. For example, large-scale display relies on the integration of discrete device dies to achieve extended micro-LED array, and full color display requires integration of red, green, and blue micro-LED units on the same substrate. Moreover, the integration with transistors or complementary metal-oxide-semiconductor circuits are necessary to control and drive the micro-LED display system. In this review article, we summarized the 3 main integration technologies for micro-LED displays, which are called transfer integration, bonding integration, and growth integration. An overview of the characteristics of these 3 integration technologies is presented, while various strategies and challenges of integrated micro-LED display system are discussed.

Fig. 1.

The main application scenarios of micro-LED display and their characteristic display area and pixel density. The insets are corresponding schematic diagrams of micro-LED subpixels fabricated by transfer integration, bonding integration, and growth integration.

Fig. 2.

Schematic illustration of the processes of substrate release by (A) LLO, (B) mechanical grinding, and wet chemical etching using (C) alkali and (D) acid solutions.

Fig. 3.

(A) Schematic illustrating stamp velocity-dependent energy-release rate. There is a critical velocity between printing and pick-up [59]. (B) Schematic diagram of transfer printing by microstructured polydimethylsiloxane (PDMS) stamp [61]. (C) Schematic of transfer printing using capillary bonding. The suspended device is picked up using an elastomeric stamp, and the bottom of LED is compressed against an acetone-wetted cloth, printing the wetted LED on a receiver substrate. Finally, LED is bonded to a new substrate after thermal curing [62].

Fig. 4.

(A) Schematic description of the laser-induced forward transfer process in solid-phase film [63]. (B) Laser-assisted PDMS stamp transfer printing [67]. (C) Schematic illustration of the MPLET concept and (D) laser transfer [68].

Fig. 5.

(A) Schematic illustrating interconnections of passive-matrix micro-LED display. (B) Optical micrograph taken after printing and via formation and (C) optical micrograph of the completed passive-matrix display [69].

Fig. 6.

(A) Process sequence for making the active-matrix micro-LED display. (B) Optical micrograph of a single pixel after printing and (C) interconnecting [69].

Fig. 7.

Schematic diagrams of (A) face-up chip, (B) vertical chip, and (C) flip chip.

Fig. 8.

(A) Bonding integration of blue LED epitaxial layer and yellow LED epitaxial layer [84]. (B) Cross-sectional schematic of a full-color micro-LED pixel with stacked RGB active layers and vertical waveguides. (C) SEM image of the full-color micro-LED array for display [85]. (D) Schematic of color mixing principle for polychromatic multiple quantum wells (MQWs) bonded with DBR. (E) Cross-sectional SEM image of full-color vertically stacked micro-LED wafer [86].

Fig. 9.

(A) Schematic of the fabrication steps for the full-color inorganic LEDs by the bonding integration. (B) Cross-sectional SEM image and (C) microscope image of the full-color LED. (D) The cross-sectional schematic of the full-color subpixel. (E) EL spectra of the full-color LEDs in white color mode. (F) Commission Internationale de l'Eclairage (CIE) coordinates of the full-color LEDs for various color modes [90].

Fig. 10.

(A) Schematic and (B) physical image of micro-LED display fabricated by flip-chip bonding with In bump. (C) The zoom-in image of a segment of a micro-LED array chip [10]. (D) Schematic of micro-LED bonded by microtube. (E) SEM images of the surface and (F) cross-sectional topography of the microtube [92]. (G) A single micro-LED in a display array emits light driven by CMOS. (H) Anisotropic conductive paste (ACF) film [141]. (I) Integrated chip after Si growth substrate removal and zoomed-in image of the micro-LED array. (J) Optical and (K) SEM cross-sectional images of the Cu/Sn bonding interface [142].

Fig. 11.

(A) Schematic illustration of the micro-LED microdisplay fabricated by wafer-level bonding process. (B) Picture of a 4-inch GaN epi-on-IC template after the growth substrate is removed. (C) SEM image of the cross-section at the metal bonding interface. (D) SEM picture showing the micro-LED arrays with 5-μm pixel pitch fabricated on the IC backplane. (E) Microdisplays with >5,000-PPI pixel density made in blue colors [97].

Fig. 12.

(A) Schematic illustration and (B) process steps of bonding integration of SOI wafer and GaN LED wafer [100]. (C) Schematic illustration and (D) process steps of active-matrix micro-LED display formed by bonding integration MoS₂ wafer and micro-LED wafer [101].

Fig. 13.

(A) Schematic illustration of tricolor LED wafer with vertically stacked active area. The (B) PL and (C) EL spectrums of the tricolor LED [107]. (D) Fabrication process steps and (E) EL spectrum of LED with laterally distributed polychromatic MQWs [107].

Fig. 14.

(A) InGaN/GaN nanopillars of different sizes and their emission wavelengths [118]. (B) Monolithic LED nanocolumn array with red and green emissions [119]. (C) Monolithic nanocolumn array multicolor LEDs [120]. (D) Monolithic 4-color pixel integrated by single nanowires. (E) SEM images and (F) PL spectrums of single InGaN/GaN nanowires with various diameters [121].

Fig. 15.

(A) Bird’s-eye-view SEM image of the blue-emitting nanopillar structures consisting of a single InGaN quantum well. The inset shows the schematic of top-down fabrication of nanopillar LED arrays. (B) PL and luminous characteristics of InGaN/GaN nanowires with various diameters [106]. (C) A schematic of top-down fabrication of full-color pixel with various diameters nanopillar LED. (D) EL and luminous characteristics of LED nanowires with various diameters [123].

Fig. 16.

(A) Cross-sectional schematic of the monolithically integrated GaN LED and GaN MOSC-HEMT using the SER approach [126]. (B) Cross-sectional schematic of the monolithically integrated GaN LED and GaN MOSFET [127]. (C) Schematic of the metal-interconnect-free HEMT-LED device using SAG approach [128]. (D) Schematic of the vertical GaN nanowire LEDs with the nanowire FETs [130].

Fig. 17.

(A) Schematic of the fabrication steps for micro-LED/HEMT hybrid wafer by SAG. Schematic of (B) the fabricated micro-LED/HEMT integrated device and (C) active-matrix display [134].

Fig. 18.

(A) Schematic of the fabrication steps, (B) optical microscope image, and (C) luminous picture of micro-LED display with the drive transistor fabricated on Si substrate [137]. (D) Cross-sectional schematic and (E) top-view microscope image of the monolithic integration of micro-LED and silicon TFT [139]. (F) Cross-sectional schematic of monolithic integration of micro-LED and MoS₂ TFT. SEM images of (G) the integrated micro-LED array and (H) pixel [143].