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Review
. 2024 Feb 19;16(1):121.
doi: 10.1007/s40820-024-01335-2.

Recent Advances in In-Memory Computing: Exploring Memristor and Memtransistor Arrays with 2D Materials

Affiliations
Review

Recent Advances in In-Memory Computing: Exploring Memristor and Memtransistor Arrays with 2D Materials

Hangbo Zhou et al. Nanomicro Lett. .

Abstract

The conventional computing architecture faces substantial challenges, including high latency and energy consumption between memory and processing units. In response, in-memory computing has emerged as a promising alternative architecture, enabling computing operations within memory arrays to overcome these limitations. Memristive devices have gained significant attention as key components for in-memory computing due to their high-density arrays, rapid response times, and ability to emulate biological synapses. Among these devices, two-dimensional (2D) material-based memristor and memtransistor arrays have emerged as particularly promising candidates for next-generation in-memory computing, thanks to their exceptional performance driven by the unique properties of 2D materials, such as layered structures, mechanical flexibility, and the capability to form heterojunctions. This review delves into the state-of-the-art research on 2D material-based memristive arrays, encompassing critical aspects such as material selection, device performance metrics, array structures, and potential applications. Furthermore, it provides a comprehensive overview of the current challenges and limitations associated with these arrays, along with potential solutions. The primary objective of this review is to serve as a significant milestone in realizing next-generation in-memory computing utilizing 2D materials and bridge the gap from single-device characterization to array-level and system-level implementations of neuromorphic computing, leveraging the potential of 2D material-based memristive devices.

Keywords: 2D materials; Crossbar array; In-memory computing; Memristors; Memtransistors.

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Conflict of interest statement

The authors declare no conflicts of interest. They have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Figures

Fig. 1
Fig. 1
A schematic of critical steps in 2D material-based in-memory computing applications. First, unique 2D material properties and the fundamental memristive device fabrication and switching mechanisms. Second, different device performance requirements for various applications, including artificial synapses and neurons. Third, different array configurations for integration design, including memristor and memtransistor crossbar array and 3D integration. Last, system-level evaluation of in-memory computing hardware, consisting of the basic computation functionalities and the overall neural network performance
Fig. 2
Fig. 2
2D material platforms for memristors and memtransistors with different switching mechanisms: a conductive filament formation, b vacancy migration, c photon response, d phase change and e ferroelectricity. The first column shows the schematic representation of the respective resistive switching mechanisms, the second column displays the measured I–V curves and the final column presents the atomic structures of 2D materials that have been used for crossbar array fabrication. a Reproduced with permission [73], copyright © 2021 Springer Nature Limited. b Reproduced with permission [77], copyright © 2019 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim. c Reproduced with permission [82], copyright © 2022 Wiley‐VCH GmbH. d Reproduced with permission [83], copyright © 2018 Springer Nature Limited. e Reproduced with permission [85], copyright © 2022 Wiley‐VCH GmbH
Fig. 3
Fig. 3
The summary of memristive device performance. a Switching energy comparison among insulating 2D h-BN-based memristors, semiconducting 2D material-based memristors, and memtransistors. b The relationship between device program voltage and the device size. c The reported device endurance and retention and their suitable working scenarios. d Radar plot of the key merits of the memristive device and the comparison with International Roadmap for Devices and Systems (IRDS) requirements. e Typical cycle-to-cycle variation of 2D material-based memristive devices. f Typical device-to-device variation of 2D material-based memristive devices. The numbers in figures correspond to the number in reference list [, , , –, , , , , , , , , –113]
Fig. 4
Fig. 4
Memristive array configurations and integrated in-memory circuits. a 1D memristor passive CBA. b 2D memristor passive CBA. c Memristor CBA with access selector devices. d Memristor CBA with access transistor devices. e Self-selective memtransistor CBA. f CBA for 3D integration. g Integration between synapse CBA and neuron devices. h Integrated in-memory circuits and its CBA. i Integrated in-memory circuits for multilayer hardware reservoirs. a Reproduced from [69]. b Reproduced with permission [73], copyright © 2021 Springer Nature Limited. c Reproduced from [47]. d Reproduced from [89]. e Reproduced with permission [86], copyright © 2021, American Chemical Society. f Reproduced from [90]. g Reproduced with permission [103], copyright © 2020 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim. h Reproduced from [121]. i Reproduced with permission [85], copyright © 2022 Wiley‐VCH GmbH
Fig. 5
Fig. 5
Fundamental functionalities of memristive arrays. a Pattern memorization based on a 5 × 5 PdSe2 memristor array. b MAC operation based on a 3 × 3 HfSe2 memristor array. c Linear regression using a 2 × 1 h-BN array. d Nonlinear regression with activation function using WSe2 synaptic transistors and activation circuits. e Convolution image processing using a 6 × 3 PdSe2 memristor array. a Reproduced with permission [73], copyright © 2021 Springer Nature Limited. b Reproduced with permission [71], copyright © 2021 Wiley‐VCH GmbH. c Reproduced from [69]. d Reproduced with permission [101], copyright © 2021, The American Association for the Advancement of Science. e Reproduced from [38]
Fig. 6
Fig. 6
System-level implementation for neural network applications. a Fully connected neural networks for MNIST dataset pattern recognition using HfSe2-based memristors. The right panel shows the relationship between offline classification accuracy and the HfSe2-based memristor RS ratio. b SNN for MNIST pattern recognition using MoS2-based memtransistors. c RNN and reservoir computing using SnS-based memristor for language recognition. d BNN for prediction of PIMA diabetes dataset using MoS2-based memtransistors. e CNN for MNIST dataset pattern recognition using MoS2-based memristors. a Reproduced with permission [71], copyright © 2021 Wiley‐VCH GmbH. b Reproduced with permission [100], copyright © 2021, American Chemical Society. c Reproduced from [81]. d Reproduced from [102]. e Reproduced from [90]

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