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. 2024 Mar 31;24(7):2237.
doi: 10.3390/s24072237.

A 26-28 GHz, Two-Stage, Low-Noise Amplifier for Fifth-Generation Radio Frequency and Millimeter-Wave Applications

Affiliations

A 26-28 GHz, Two-Stage, Low-Noise Amplifier for Fifth-Generation Radio Frequency and Millimeter-Wave Applications

Aymen Ben Hammadi et al. Sensors (Basel). .

Abstract

This paper presents a high-gain low-noise amplifier (LNA) operating at the 5G mm-wave band. The full design combines two conventional cascode stages: common base (CB) and common emitter (CS). The design technique reduces the miller effect and uses low-voltage supply and low-current-density transistors to simultaneously achieve high gain and low noise figures (NFs). The two-stage LNA topology is analyzed and designed using 0.25 µm SiGe BiCMOS process technology from NXP semiconductors. The measured circuit shows a small signal gain at 26 GHz of 26 dB with a gain error below 1 dB on the entire frequency band (26-28 GHz). The measured average NF is 3.84 dB, demonstrated over the full frequency band under 15 mA current consumption per stage, supplied with a voltage of 3.3 V.

Keywords: SiGe BiCMOS; cascode; fifth-generation mm-wave; low-noise amplifier; noise figure.

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Conflict of interest statement

The authors declare that they have no conflicts of interest. All authors confirm that they have no conflicts of interest between themselves or with the party sponsoring this work.

Figures

Figure 1
Figure 1
(a) Schematic of a basic approach simplifying the architecture of a transmission system. (b) Schematic of the proposed approach for the architecture of a transmission system.
Figure 2
Figure 2
Full chip circuit for antenna with LNA/PA.
Figure 3
Figure 3
Circuit setup for optimum transistor size selection.
Figure 4
Figure 4
Characteristics of a transistor (gain. NF. and NFmin versus vbe).
Figure 5
Figure 5
Input matching network.
Figure 6
Figure 6
Cascode amplifier with emitter degeneration without biasing.
Figure 7
Figure 7
Simplified small signal hybrid π-model of cascode amplifier with emitter degeneration.
Figure 8
Figure 8
Schematic of proposed ka-band 5G LNA.
Figure 9
Figure 9
Circle of noise figure and the input impedance at 27 GHz.
Figure 10
Figure 10
Simulation results of the input and output return losses of the two-stage LNA.
Figure 11
Figure 11
Simulated noise figure of the two-stage LNA.
Figure 12
Figure 12
Stability factor (Kf) of the two-stage LNA.
Figure 13
Figure 13
Input-referred P1 dB of the proposed LNA.
Figure 14
Figure 14
IIP3 of the proposed LNA.
Figure 15
Figure 15
Layout and die photo of the fabricated 5G mm-wave LNA.
Figure 16
Figure 16
LNA under test: (a) Photograph of the LNA chip. Dimensions are 702 × 1220 µm2. (b) Measurement bench for the characterization of the LNA.
Figure 17
Figure 17
Simulated and measured values of S11, S22, S21, and S12 for the two-stage LNA.
Figure 18
Figure 18
Simulated and measured NF for the two-stage LNA.
Figure 19
Figure 19
Input_referred P1 dB of the proposed LNA.
Figure 20
Figure 20
IIP3 of the proposed LNA.

References

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