The future of two-dimensional semiconductors beyond Moore's law

Ki Seok Kim^#^{1

2}, Junyoung Kwon^#³, Huije Ryu^#³, Changhyun Kim^#³, Hyunseok Kim^#^{1

4}, Eun-Kyu Lee³, Doyoon Lee^{2

5}, Seunghwan Seo^{1

2}, Ne Myo Han^{1

2}, Jun Min Suh^{1

2}, Jekyung Kim^{1

2}, Min-Kyu Song^{1

2}, Sangho Lee^{1

2}, Minsu Seol⁶, Jeehwan Kim^{7

8

9

10}

Affiliations

¹ Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA.
² Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, USA.
³ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea.
⁴ Department of Electrical and Computer Engineering, University of Illinois Urbana-Champaign, Urbana, IL, USA.
⁵ Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA.
⁶ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea. minsu.seol@samsung.com.
⁷ Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.
⁸ Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.
⁹ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea. jeehwan@mit.edu.
¹⁰ Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.

^# Contributed equally.

PMID: 38951597
DOI: 10.1038/s41565-024-01695-1

Review

The future of two-dimensional semiconductors beyond Moore's law

Ki Seok Kim et al. Nat Nanotechnol. 2024 Jul.

. 2024 Jul;19(7):895-906.

doi: 10.1038/s41565-024-01695-1. Epub 2024 Jul 1.

Authors

Affiliations

¹ Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA.
² Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, USA.
³ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea.
⁴ Department of Electrical and Computer Engineering, University of Illinois Urbana-Champaign, Urbana, IL, USA.
⁵ Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA.
⁶ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea. minsu.seol@samsung.com.
⁷ Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.
⁸ Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.
⁹ Samsung Advanced Institute of Technology, Samsung Electronics Co. Ltd, Suwon, Korea. jeehwan@mit.edu.
¹⁰ Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA. jeehwan@mit.edu.

^# Contributed equally.

PMID: 38951597
DOI: 10.1038/s41565-024-01695-1

Abstract

The primary challenge facing silicon-based electronics, crucial for modern technological progress, is difficulty in dimensional scaling. This stems from a severe deterioration of transistor performance due to carrier scattering when silicon thickness is reduced below a few nanometres. Atomically thin two-dimensional (2D) semiconductors still maintain their electrical characteristics even at sub-nanometre scales and offer the potential for monolithic three-dimensional (3D) integration. Here we explore a strategic shift aimed at addressing the scaling bottleneck of silicon by adopting 2D semiconductors as new channel materials. Examining both academic and industrial viewpoints, we delve into the latest trends in channel materials, the integration of metal contacts and gate dielectrics, and offer insights into the emerging landscape of industrializing 2D semiconductor-based transistors for monolithic 3D integration.

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References

1. Moore, G. E. Cramming more components onto integrated circuits. Proc. IEEE 86, 82–85 (1998). - DOI
1. Moore, G. E. Progress in digital integrated electronics. In Technical Digest. International Electron Devices Meeting (IEDM) 11–13 (IEEE, 1975). This article discusses the complexity of integrated circuits, identifies their manufacture, production and deployment and addresses trends to their future deployment.
1. Hu, C. Future CMOS scaling and reliability. Proc. IEEE 81, 682–689 (1993). - DOI
1. Packan, P. A. Pushing the limits. Science 285, 2079–2081 (1999). - DOI
1. Pop, E., Sinha, S. & Goodson, K. E. Heat generation and transport in nanometer-scale transistors. Proc. IEEE 94, 1587–1601 (2006). - DOI

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The future of two-dimensional semiconductors beyond Moore's law

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The future of two-dimensional semiconductors beyond Moore's law

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