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. 2024 Jul 11;19(7):e0306540.
doi: 10.1371/journal.pone.0306540. eCollection 2024.

Development of low-cost micro-fabrication procedures for planar micro-thermoelectric generators based on thin-film technology for energy harvesting applications

Sobhy M Abdelkader  1   2 , Donart Nayebare  1 , Tamer F Megahed  1   2 , Ahmed M R Fath El-Bab  3 , Mohamed A Ismeil  4 , Omar Abdel-Rahim  5
Affiliations

Development of low-cost micro-fabrication procedures for planar micro-thermoelectric generators based on thin-film technology for energy harvesting applications

Sobhy M Abdelkader et al. PLoS One. .

Abstract

With the rapid proliferation of portable and wearable electronics, energy autonomy through efficient energy harvesting has become paramount. Thermoelectric generators (TEGs) stand out as promising candidates due to their silent operation, high reliability, and maintenance-free nature. This paper presents the design, fabrication, and analysis of a micro-scale TEG for powering such devices. A planar configuration was employed for its inherent miniaturization advantages. Finite element analysis using ANSYS reveals that a double-layer device under a 50 K temperature gradient generates an impressive open-circuit voltage of 1417 mV and a power output of 2.4 μW, significantly exceeding its single-layer counterpart (226 mV, 0.12 μW). Validation against the analytical model results yields errors within 2.44% and 2.03% for voltage and power, respectively. Furthermore, a single-layer prototype fabricated using paper shadow masks and sputtering deposition exhibits a voltage of 131 mV for a 50 K temperature difference, thus confirming the feasibility of the proposed design. This work establishes a foundation for developing highly efficient micro-TEGs for powering next-generation portable and wearable electronics.

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Conflict of interest statement

The authors have declared that no competing interests exist.

Figures

Fig 1
Fig 1. Schematic showing one thermoelectric pair (vertical configuration) and equivalent electrical circuit.
Fig 2
Fig 2. Isometric view of the proposed design.
Fig 3
Fig 3
Temperature and Voltage distributions at ΔT = 20K: (a) Temperature, (b) Voltage.
Fig 4
Fig 4
Analytical Vs Simulation results: (a) Voltage, (b) Power.
Fig 5
Fig 5. Fabrication procedure schematic of a single layer device.
Fig 6
Fig 6
Substrate preparation: (1) Silicon wafer, (2) Ultrasonic cleaner (LABSONIC LBS2-4,5), (3) Dicing saw (DAD322) and (4) Spin coater (WS-650-23B).
Fig 7
Fig 7. Illustrating the use of sticky paper from the backside.
Fig 8
Fig 8
Shadow Mask preparation: (1) CO2 laser cutting machine (VLS 3.5), (2–3) Acrylic masks, and (4–6) Paper masks.
Fig 9
Fig 9
Shadow Mask optimization study using different laser cutting combinations: (1) Paper mask using vector mode, (2) Paper mask using raster mode, (3) Acrylic mask using vector mode, and (4) Acrylic mask using raster).
Fig 10
Fig 10. Prepared shadow mask (paper).
Fig 11
Fig 11
Deposition and fabrication of the device (single-layer): (1) First mask fitted onto the substrate, (2) Metal 1 deposited circuit, (3) Second mask fitted, and (4) Second metal deposited and final device.
Fig 12
Fig 12. Experimental setup.
Fig 13
Fig 13
Temperature difference versus (a) Voltage and (b) Power.
Fig 14
Fig 14
Experimental vs Simulation: (a) Voltage, (b) Power.
See this image and copyright information in PMC

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