High-voltage FinFET with floating poly and high-k material for enhanced intrinsic gain and safe operating area

Abstract

We propose a new drain-extended FinFET (DeFinFET) that can improve the intrinsic gain (g_m/g_ds) and the electrical safe operating area (SOA). This structure features a novel utilization of the drain potential by using a floating poly (FP) and split high-k material (HK) on the drain and drift regions. This method effectively controls the potential drop profile within the drift region, which makes a uniform electric field distribution in the gate-on state. The evenly distributed electric field significantly increases the on-state breakdown voltage (7.33 V) compared to a conventional structure (5.89 V). In addition, it prevents the device from operating in an undesirable quasi-saturation mode, even after space charge modulation. This operation distinguishes our results from other studies, showing a notable improvement in g_m/g_ds. Moreover, electron accumulation is induced in the drift region, leading to a significant decrease in the on-resistance. As a result, the proposed device demonstrates clear advantages in high-voltage applications with a 45% expanded electrical SOA over conventional DeFinFET.

Fig. 1

Proposed structure (FPHK) utilized in this study. (a) Bird’s eye view and (b) A-A’ cross-sectional view. Floating poly (FP) is partially introduced on the N-Well and drain junction, and high-k material (HK) is selectively deposited on the drift region adjacent to FP. The potential of FP is transmitted to the drift region through HK, leading to a potential modulation within the drift region. (c) Process flow for FPHK. The black text outlines the conventional Drain-extended FinFET. (i)-(iii) steps depict optimization factors for FPHK, and (iv) step describes an additional step specific to FPHK. Specific sections of the spacers and oxide are deliberately left out to improve the visual clarity of the structure.

Fig. 2

Calibration results for measured data. (a) Transfer curve at V_DS = 0.05 and 0.7 V. (b) Output curve at V_GS = 0.5, 0.6, and 0.7 V. (c) Breakdown characteristic curve at V_GS = 0.0 V. The simulation framework is fine-tuned to accurately capture the performance of nano-scale FinFET and breakdown mechanism in DeFinFET.

Fig. 3

(a) Derivative of I_DS as a function of V_DS with V_GS of 0.0 V and 0.7 V for Conv and FPHK. The breakdown points representing BV_ON and BV_OFF are indicated. (b)E_lat under the gate-off and on state at V_DS = 3.3 V for Conv. There is no significant difference between BV_OFF and BV_ON for FPHK, while for Conv, the electric field is concentrated at the DE region upon gate-on, leading to a significant decrease in BV_ON.

Fig. 4

(a)E_lat and (b) electrostatic potential in the drift region along the horizontal cut-line, and (c) electrostatic potential captured in the drift region under the on-state bias condition for Conv and FPHK. Conv shows a high electric peak at DE, whereas FPHK demonstrates an evenly distributed E_lat with the suppression of sharp potential drop in the drift region. (d) Space charge for FPHK along the horizontal cut-line under the on-state bias condition at the regions (ii) and (iii).

Fig. 5

(a)BV_ON and R_ON for Conv and FPHK with different L_HK. Throughout the entire L_HK range, FPHK shows increased BV_ON and reduced R_ON compared to Conv. (b)E_lat and (c)E_{lat, max} for different L_HK under the on-state bias condition for Conv and FPHK. At L_HK = 60 nm, FPHK achieves the lowest E_{lat, max}, showing a balance between electric field distribution within the region (ii) and (iii). (d) Electron density for Conv and FPHK under the R_ON extraction bias condition. The potential of FP, increased by drain bias, is transmitted to the drift region through HK, resulting in electron accumulation within the drift region.

Fig. 6

(a) Transfer and (b) output curves for Conv and FPHK. (c)g_m, (d)g_ds, and (e)V_K for Conv and FPHK as a function of I_DS. FPHK shows an improved g_m flatness compared to Conv. As I_DS increases, Conv shows a sharp increase in g_ds after SCM, while the increase in FPHK is suppressed. (f) Electron Density along the horizontal cut-line under the on-state bias condition for Conv and FPHK. FPHK shows a clearer pinch-off.

Fig. 7

(a)g_m/g_ds for Conv and FPHK as a function of I_DS. After SCM, Conv shows a sharp decrease in g_m/g_ds, while FPHK demonstrates an improved flatness with a significantly reduced decrease rate. (b) Electrical SOA for Conv and FPHK. FPHK shows a 45% expanded electrical SOA compared to Conv.