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. 2025 Jan 8;17(1):1341-1349.
doi: 10.1021/acsami.4c18928. Epub 2024 Dec 18.

GaAs Solar Cells Grown Directly on V-Groove Si Substrates

Affiliations

GaAs Solar Cells Grown Directly on V-Groove Si Substrates

Theresa E Saenz et al. ACS Appl Mater Interfaces. .

Abstract

The direct epitaxial growth of high-quality III-V semiconductors on Si is a challenging materials science problem with a number of applications in optoelectronic devices, such as solar cells and on-chip lasers. We report the reduction of dislocation density in GaAs solar cells grown directly on nanopatterned V-groove Si substrates by metal-organic vapor-phase epitaxy. Starting from a template of GaP on V-groove Si, we achieved a low threading dislocation density (TDD) of 3 × 106 cm-2 in the GaAs by performing thermal cycle annealing of the GaAs followed by growth of InGaAs dislocation filter layers. This approach eliminates the need for a metamorphic buffer to directly integrate low-TDD GaAs on Si. We used these low-TDD GaAs/V-groove Si templates to grow GaAs double heterostructures that had a minority carrier lifetime of 5.7 ns, as measured by time-resolved photoluminescence, a value consistent with the material quality associated with a 20%+ efficient GaAs solar cell. However, front-junction GaAs solar cells grown on these low-TDD substrates produced a conversion efficiency of only 6.6% without an antireflection coating. Electron channeling contrast imaging measurements on this cell showed a high density of misfit dislocations at the interface between the AlInP/GaInP window layer and the GaAs absorber and between the GaAs absorber and the GaInP back surface field (BSF), likely causing a high surface recombination velocity and thus poor performance. We showed that we could reduce (and in the case of the BSF, eliminate) these dislocations by employing an AlGaAs-based window layer and BSF. Compared to GaInP, AlGaAs has dislocation glide properties that are more similar to those of GaAs, resulting in more even threading dislocation glide between layers. AlGaAs passivation improved the external quantum efficiency and open-circuit voltage of the devices, but the overall device performance was still low at an efficiency of 7.7% without an antireflection coating, likely due to cracking in the devices. This work demonstrates a route to high material quality in GaAs grown directly on Si that can be used for the production of III-V/Si optoelectronic devices.

Keywords: III−V; Si; dislocations; epitaxy; nanopatterning; semiconductors; solar cells.

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Conflict of interest statement

The authors declare no competing financial interest.

Figures

Figure 1
Figure 1
(a) Schematic and ECCI measurements of the structure used to achieve a low dislocation density in GaAs grown on V-groove Si. This structure was used as the template for solar cells and TRPL structures. Plan-view ECCI shows a TDD of (1) 5 × 108 cm–2 after 3 μm of GaAs growth, (2) 3 × 107 cm–2 after four cycles of TCA between 350 and 800 °C, and (3) 3 × 106 after the growth of an InGaAs dislocation filter structure and a GaAs capping layer. (b) Schematic and ECCI measurements of a control structure with a thinner GaAs buffer resulting in a relatively high TDD. Plan-view ECCI shows a TDD of (1) 9 × 108 cm–2 after 1 μm of GaAs growth, (2) 3 × 108 cm–2 after four cycles of TCA between 350 and 800 °C, and (3) 1 × 107 cm–2 after the growth of an InGaAs dislocation filter structure and a GaAs capping layer.
Figure 2
Figure 2
ECCI images of double heterostructures grown on low-TDD GaAs/V-groove Si templates, showing a high density of misfit dislocations at the barrier layer/test layer interface when GaInP barriers are used (a, MU504) but few misfits when AlGaAs is used (b, MU670). The misfit-free AlGaAs sample produced a higher TRPL lifetime. (c) TRPL data of each structure along with the fitted minority carrier lifetimes extracted from the data.
Figure 3
Figure 3
Schematics of (a) the AlInP/GaInP-passivated GaAs solar cells (base doping of 9 × 1017 cm–3 per capacitance–voltage measurement) and (b) the AlGaAs-passivated GaAs solar cells (base doping of 5 × 1017 cm–3).
Figure 4
Figure 4
(a) External quantum efficiency of GaInP-passivated and AlGaAs-passivated GaAs/V-groove Si solar cells scaled and compared to corresponding large baseline solar cells grown on GaAs. (b) Light IV and (c) dark IV curves of the GaInP-passivated and AlGaAs-passivated GaAs/V-groove Si solar cells compared to their corresponding small baselines.
Figure 5
Figure 5
(a) Plan-view ECCI image of a GaInP-passivated GaAs solar cell (all images above blue line; design shown in Figure 3a) grown on V-groove Si showing a high density of misfit dislocations at the window/emitter interface. (b) STEM showing misfit dislocations at the window/base and base/BSF interface in the GaInP-passivated GaAs solar cell. (c and d) Higher-magnification images of these two interfaces. (e) In ECCI of the AlGaAs-passivated cell (all images below red line; design shown in Figure 3b), misfits are still visible, but only in one direction. (f) STEM showing misfit dislocations at the window/base but not the base/BSF interface in the AlGaAs-passivated GaAs solar cell. (g and h) Higher-magnification images of these two interfaces.
Figure 6
Figure 6
(a) Optical image with cracks highlighted in red showing the crack array on a GaAs on a V-groove solar cell with a 7.4 μm total III–V stack thickness (MU507). (b) SEM image of a crack formed prior to processing that was filled with gold during electroplating, crossing two fingers. Two cracks also run parallel to the fingers, but they formed during processing and are not filled with gold. (c) Optical image of a processed solar cell crossed by several cracks that formed during processing. (d) Electroluminescence image of a GaAs on V-groove solar cell showing significant regions on the cell not working because of cracking.

References

    1. Almansouri I.; Ho-Baillie A.; Bremner S. P.; Green M. A. Supercharging Silicon Solar Cell Performance by Means of Multijunction Concept. IEEE J. Photovolt. 2015, 5, 968–976. 10.1109/JPHOTOV.2015.2395140. - DOI
    1. Essig S.; Allebe C.; Remo T.; Geisz J. F.; Steiner M. A.; Horowitz K.; Barraud L.; Ward J. S.; Schnabel M.; Descoeudres A.; Young D. L.; Woodhouse M.; Despeisse M.; Ballif C.; Tamboli A. Raising the one-sun conversion efficiency of III-V/Si solar cells to 32.8% for two junctions and 35.9% for three junctions. Nat. Energy 2017, 2, 17144.10.1038/nenergy.2017.144. - DOI
    1. Schygulla P.; Müller R.; Lackner D.; Höhn O.; Hauser H.; Bläsi B.; Predan F.; Benick J.; Hermle M.; Glunz S. W.; Dimroth F. Two-terminal III-V//Si triple-junction solar cell with power conversion efficiency of 35.9% at AM1.5G. Progress in Photovoltaics: Research and Applications 2022, 30, 869–879. 10.1002/pip.3503. - DOI
    1. Schygulla P.; Müller R.; Höhn O.; Schachtner M.; Chojniak D.; Cordaro A.; Tabernig S.; Bläsi B.; Polman A.; Siefer G.; Lackner D.; Dimroth F. Wafer-bonded two-terminal III-V//Si Triple-Junction Solar Cell With Power Conversion Efficiency of 36.1% at AM1.5G. Progress in Photovoltaics 2023, n/a.10.1002/pip.3769. - DOI
    1. Ward J. S.; Remo T.; Horowitz K.; Woodhouse M.; Sopori B.; VanSant K.; Basore P. Techno-economic analysis of three different substrate removal and reuse strategies for III-V solar cells. Prog. Photovolt: Res. Appl. 2016, 24, 1284–1292. 10.1002/pip.2776. - DOI

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