Interferometric single-shot parity measurement in InAs-Al hybrid devices

Abstract

The fusion of non-Abelian anyons is a fundamental operation in measurement-only topological quantum computation¹. In one-dimensional topological superconductors (1DTSs)^2-4, fusion amounts to a determination of the shared fermion parity of Majorana zero modes (MZMs). Here we introduce a device architecture⁵ that is compatible with future tests of fusion rules. We implement a single-shot interferometric measurement of fermion parity^6-11 in indium arsenide-aluminium heterostructures with a gate-defined superconducting nanowire^12-14. The interferometer is formed by tunnel-coupling the proximitized nanowire to quantum dots. The nanowire causes a state-dependent shift of the quantum capacitance of these quantum dots of up to 1 fF. Our quantum-capacitance measurements show flux h/2e-periodic bimodality with a signal-to-noise ratio (SNR) of 1 in 3.6 μs at optimal flux values. From the time traces of the quantum-capacitance measurements, we extract a dwell time in the two associated states that is longer than 1 ms at in-plane magnetic fields of approximately 2 T. We discuss the interpretation of our measurements in terms of both topologically trivial and non-trivial origins. The large capacitance shift and long poisoning time enable a parity measurement with an assignment error probability of 1%.

Fig. 1. Device design for interferometric fermion parity measurement.

a, Idealized model of the system. A nanowire tuned into a 1DTS state hosts MZMs at its ends, depicted by stars. A quantum dot is tunably coupled to the MZMs by tunnel couplings t_L and t_R, forming an interferometer, which is sensitive to the magnetic flux Φ enclosed by the dashed line and the combined fermion parity Z of the dot–MZMs system. Poisoning by a quasiparticle (purple circle) flips the parity. b, Example energy spectra of the interferometer with total parity Z = −1 (red) and Z = +1 (blue) in the vicinity of the avoided crossing between the states with N and N + 1 electrons on the dot, as a function of the plunger voltage on the quantum dot; see equation (2). c, Gate layout for the interference loop formed by the triple quantum dot and the gate-defined nanowire (light green). Voltage V_WP1 is applied to the wire plunger gate (yellow) and voltage V_QD2 is applied to the dot 2 plunger gate (purple). The effective couplings t_L and t_R of panel a depend on the couplings t_m1, t₁₂ and t_m2, t₂₃ and detuning of quantum dots 1 and 3, respectively. Quantum dot 2 is capacitively coupled to an off-chip resonator chip for dispersive gate sensing and C_Q measurement, which also includes a bias tee for applying dc voltages.

Fig. 2. Material stack and electron micrograph.

a, Cross-section of the gate-defined superconducting nanowire device design. b, Scanning electron microscopy image with the aluminium strip (blue), first gate layer (yellow) and second gate layer (purple) indicated in false colour. Scale bar, 1 μm.

Fig. 3. Experimental demonstration of fermion parity measurements.

Measurements in device A (measurement A1) in the (B_∥, V_WP1) parameter regime identified through the tune-up procedure discussed in the main text and Section 4 of the Supplementary Information; specifically, V_WP1 = −1.8314 V and B_∥ = 1.8 T. The raw rf signal has been converted to complex ${\tilde{C}}_{\mathrm{Q}}$ by the method described in Section 3.1 of the Supplementary Information. a,d, Time traces at B_x values corresponding to minimal (panel a) and maximal (panel d) values of ΔC_Q for a fixed choice of V_QD2 close to charge degeneracy. b,e, Histograms of complex ${\tilde{C}}_{\mathrm{Q}}$ for the time trace shown in panels a and d. c,f, Histograms of the real part $\mathrm{Re}{\tilde{C}}_{\mathrm{Q}}$ with Gaussian fits for an extraction of the SNR = δ/(σ₁ + σ₂) = 5.01, the details of which are given in Section 3.3 of the Supplementary Information. g, Histogram of dwell times aggregated over all values of B_x, in which the signal shows bimodality. Fitting to an exponential shows that the up and down dwell times agree to within the standard error on the fits: 2.05 ± 0.07 ms and 2.02 ± 0.07 ms, respectively. h, Histogram of ${\tilde{C}}_{\mathrm{Q}}$ values as a function of B_x, showing clear bimodality that is flux-dependent with period h/2e. The vertical arrows indicate the B_x values at which the time traces in panels a and d were taken. i, Kurtosis in the measured quantum capacitance, $K\left(\text{Re}{\tilde{C}}_{\mathrm{Q}}\right)$, of dot 2 as a function of B_x (which controls Φ) and ΔV_QD2, the change in dot plunger gate voltage from the starting point of the scan (which controls the dot 2 detuning). The dashed red rectangle indicates the ΔV_QD2 value at which the data in the other panels were taken.

Fig. 4. Simulation of fermion parity measurements.

Simulated dynamical C_Q as a function of magnetic flux and dot 2 gate offset charge N_g2, including the effects of charge and readout noise, as well as non-zero temperature, drive power and frequency, per the discussion in the text. a, Histogram of the two parity sectors for fixed N_g2 = 0.49. Here we used t_m1 = t_m2 = 6 μeV, t₁₂ = t₂₃ = 8 μeV, E_C1 = 140 μeV, E_C2 = 45 μeV, E_C3 = 100 μeV, N_g1 = N_g3 = 0.3, T = 50 mK and E_M = 0. b, Kurtosis of C_Q(t) as a function of N_g2 and flux through the loop. The middle of the dashed red rectangle indicates the N_g2 value used for the linecut in panel a.