Scalable fabrication of Chip-integrated 3D-nanostructured electronic devices via DNA-programmable assembly

Abstract

DNA-based self-assembly methods have demonstrated powerful and unique capabilities to encode nanomaterial structures through the prescribed placement of inorganic and biological nanocomponents. However, the challenge of selectively growing DNA superlattices on specific locations of surfaces and their integration with conventional nanofabrication has hindered the fabrication of three-dimensional (3D) DNA-assembled functional devices. Here, we present a scalable nanofabrication technique that combines bottom-up and top-down approaches for selective growth of 3D DNA superlattices on gold microarrays. This approach allows for the fabrication of self-assembled 3D-nanostructured electronic devices. DNA strands are bound onto the gold arrays, which anchor DNA origami frames and promote ordered framework growth on the specific areas of the surface, enabling control of the lateral placement and orientation of superlattices. DNA frameworks selectively grown on the pads are subsequently templated to nanoscale silica and tin oxide (SnO_x) that follow the architecture, as confirmed by structural and chemical characterizations. The fabricated SnO_x superlattices are integrated into devices that demonstrate photocurrent response.

Fig. 1.. Area-selective growth of DNA superlattices on surfaces.

(A) Schematic of selective area growth of DNA superlattices on gold pads (yellow) functionalized with DNA strands (green and red). A gold-patterned silicon substrate immobilizes DNA strands with encoded complementary interactions using gold-thiol chemistry, followed by hybridization of target origami frames to the specific areas of the surface and lattice assembly. Sol-gel synthesis across a patterned silicon substrate area is used for silica templating of formed frameworks. (B) Top, optical microscope image of epitaxial growth of superlattice from a DNA functionalized gold line. Bottom, frequency plot of nucleates from the above image counting the number of crystals in each column. Annotated on the plot are two windows 60 μm wide corresponding to the depletion region. Scale bar, 50 μm. (C) Low-magnification DNA superlattice crystals grown across a 10 mm–by–10 mm pattern of gold pads. Scale bar, 500 μm. (D) Optical microscope image of the array of 5 μm–by–5 μm gold patches on silicon with self-assembled DNA superlattice templated to silica, composed of singular and polycrystalline domains. (E) Magnified view of nanolattice (within green dotted region) grown on a pad (red dotted region).

Fig. 2.. Orientated growth of superlattices and interfacial defects.

(A) Monofunctionalized surfaces with X or X′ strands lead to superlattice oriented in the [111] direction as complimentary origami assembly along {100} directions from an initial (111) plane. From left to right, SEM images, top-down and 52°, followed by a cross-sectional view of a nanolattice, which displays voids and coalescence of origami arrays. (B) Bifunctionalization of the surface with both X and X′ strands, leading to [100] oriented domains. From left to right, SEM images, top-down and a 45°, followed by a cross-sectional view of nanolattice voids and defects within the first 1 μm from the interface. (C) Hard x-ray tomography of a surface-grown superlattice, cross-sectional view of the nanostructure from a (100) oriented grain. Multiple domains are visible within the superlattice as evidenced by discontinuities in the lattice geometry often accompanied by voids to accommodate lattice mismatch.

Fig. 3.. Fabrication of the device based on 3D Sn-framework.

(A) Schematic of the preparation of SnO_x-SiO₂ superlattices using VPI followed by thermal annealing and electrode deposition. (B) SEM of the fabricated device with electrodes on four corners. (C) SEM-EDS map of selective area–grown superlattice coated with tin and contacted with gold electrodes. (D) High magnification SEM of the lattice, top surface. (E) STEM high-angle annular dark field (HAADF) image of cross-sectioned nanolattice. Scale bar, 20 nm (F) STEM-EDS map from location E, which displays the tin-coated superlattice, with the thickness of the tin estimated between 2 and 4 nm; see also STEM HAADF and EDS maps in fig. S19. Scale bar, 20 nm. (G) EDS spectroscopy of tin oxide nanolattice and gold patch beneath the structure. (H) Grazing incidence XRD of SnO-SiO₂ superlattice array that shows broad SnO₂ peaks corresponding to the thin nanostructure on the superlattice along with sharp gold peaks from the ~60-nm–thick gold surface patches.

Fig. 4.. Photocurrent response of devices with integrated 3D SnO_x superlattices.

(A) SEM image of the lattices measured with false color added for the current pathway. Scale bar, 30 μm. (B) Current-voltage curves for superlattices tested individually and connected in series. (C) Current-voltage curve measured on nanolattice device three D3 in dark (blue) and under UV light (340 nm) illumination (orange). Scale bar, 10 μm. (D) Current versus time measurement at constant voltage bias (0.2 V) as light exposure was turned on/off every 5 s on D3. The initial drift in the measured current saturates at around 300 μA. The inset shows a zoom-in region of steady-state behavior with a 50-μA response.