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. 2025 Aug 5;25(15):4822.
doi: 10.3390/s25154822.

Onboard Real-Time Hyperspectral Image Processing System Design for Unmanned Aerial Vehicles

Ruifan Yang  1   2   3 , Min Huang  1   2   3 , Wenhao Zhao  1   3 , Zixuan Zhang  1   3 , Yan Sun  1   3 , Lulu Qian  1   2   3 , Zhanchao Wang  1   2   3
Affiliations

Onboard Real-Time Hyperspectral Image Processing System Design for Unmanned Aerial Vehicles

Ruifan Yang et al. Sensors (Basel). .

Abstract

This study proposes and implements a dual-processor FPGA-ARM architecture to resolve the critical contradiction between massive data volumes and real-time processing demands in UAV-borne hyperspectral imaging. The integrated system incorporates a shortwave infrared hyperspectral camera, IMU, control module, heterogeneous computing core, and SATA SSD storage. Through hardware-level task partitioning-utilizing FPGA for high-speed data buffering and ARM for core computational processing-it achieves a real-time end-to-end acquisition-storage-processing-display pipeline. The compact integrated device exhibits a total weight of merely 6 kg and power consumption of 40 W, suitable for airborne platforms. Experimental validation confirms the system's capability to store over 200 frames per second (at 640 × 270 resolution, matching the camera's maximum frame rate), quick-look imaging capability, and demonstrated real-time processing efficacy via relative radio-metric correction tasks (processing 5000 image frames within 1000 ms). This framework provides an effective technical solution to address hyperspectral data processing bottlenecks more efficiently on UAV platforms for dynamic scenario applications. Future work includes actual flight deployment to verify performance in operational environments.

Keywords: FPGA-ARM; embedded system; hyperspectral; onboard; real-time processing.

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Conflict of interest statement

The authors declare no conflicts of interest.

Figures

Figure 1
Figure 1
Onboard Real-Time HIS Processing System.
Figure 2
Figure 2
Three-dimensional rendered exterior view of the Micro-Hyperspec SWIR 640 (NBL Imaging System Ltd., Guangzhou, China).
Figure 3
Figure 3
Appearance diagram of the EPSILON D IMU sensor (FDIsystems Ltd., Hefei, China).
Figure 4
Figure 4
Physical configuration of the SATA SSD (Samsung Electronics Ltd., Seoul, Republic of Korea).
Figure 5
Figure 5
Appearance diagram of key-digit interface panel.
Figure 6
Figure 6
The core control board of key control module.
Figure 7
Figure 7
ARM-side three-thread operation mode block diagram.
Figure 8
Figure 8
HSI receiver thread block diagram.
Figure 9
Figure 9
Physical assembly external view of the UAV payload.
Figure 10
Figure 10
Internal view of dual-layer physical assembly.
Figure 11
Figure 11
The complete data transmission pipeline of the system.
Figure 12
Figure 12
The experimental scheme.
Figure 13
Figure 13
The experimental site.
Figure 14
Figure 14
The quick-look visualization output.
Figure 15
Figure 15
Standard push-broom acquired imagery.
Figure 16
Figure 16
Bidirectional oscillatory push-broom comparison image.
Figure 17
Figure 17
Results of relative radiometric correction. (a) Original image; (b) corrected image after relative radiometric processing.
See this image and copyright information in PMC

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